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* Use the single byte FIFO, the correct implementation of the two bytes FIFO in...Luiz Souza2017-10-201-69/+32
* White space fixes.Luiz Souza2017-10-191-4/+4
* Disable the two bytes FIFO after the transfer to keep the controller in a con...Luiz Souza2017-10-191-0/+3
* Speed up the SPI driver.Luiz Souza2017-10-181-1/+1
* Enable the two bytes FIFO when possible.Luiz Souza2017-10-181-29/+75
* Add the SPI driver for the Marvell Armada 38x/Orion.Luiz Souza2017-10-182-0/+340
* Fix a typo.Luiz Souza2017-09-061-1/+1
* Do no reuse sysctl OIDs.Luiz Souza2017-09-061-1/+1
* Declare the variable...Luiz Souza2017-09-061-0/+6
* Enable the LED drivers on rogue-1.Luiz Souza2017-09-061-1/+1
* Enable pl310 coherent operation in platform init for Armada 38xmw2017-09-061-0/+3
* Dynamically configure timers' base frequency for Armada 38xmw2017-09-061-0/+4
* Fix remapping VM attributes on Armada 38xmw2017-09-061-1/+1
* Create root DMA tag and fix MBUS windows on DMA coherent platformszbb2017-09-062-2/+47
* Implement workaround for Armada 38X family HW issue between CPU and deviceszbb2017-09-061-0/+10
* Add a missing label.Luiz Souza2017-09-061-2/+2
* Enhance Armada 38x SoC identification stringzbb2017-09-068-2/+70
* Enable HWPMC overflow IRQ on both CPUs in MPICzbb2017-09-061-1/+32
* Introduce Armada 38x/XP network controller supportzbb2017-09-063-0/+23
* Add function to dump PCIE MBUS decoding windows and barszbb2017-09-061-1/+20
* Support multi-port PCIe hierarchy in Marvell boards DTSzbb2017-09-063-8/+367
* Fix PCIe window decoding on Armada 38xzbb2017-09-061-26/+65
* Enable MBUS bridge configuration in mv_rtc driverzbb2017-09-061-12/+41
* Add reset capability to mv_rtc driverzbb2017-09-061-0/+55
* Unmask legacy interrupts on Marvell PCIE controllerzbb2017-09-061-1/+1
* Add workaround for CESA MBUS windows with 4GB DRAMzbb2017-09-061-1/+16
* Fix PM recognition on recent Marvell boardszbb2017-09-061-5/+14
* Introduce separate watchdog driver for Armada to fix phony DELAYzbb2017-09-063-1/+287
* Enable SCU Speculative linefills to L2 on Armada 38xzbb2017-09-062-2/+7
* Fix memory corruption while configuring CPU windows on Marvell SoCszbb2017-09-061-0/+12
* Fix boot up on ARMADA38X uniprocessor variantwma2017-09-061-1/+1
* Fix MPIC mask/unmaskwma2017-09-061-6/+18
* Enable proper configuration of CESA MBUS windowswma2017-09-062-1/+72
* Remove code for Marvell SoCs that lack a kernel config.andrew2017-09-064-120/+10
* Use the MACROS to access the Global mpic registers. Makes the codeloos2017-09-061-31/+8
* Fix registration of MPIC driverzbb2017-09-061-0/+3
* Correct MPIC order of attachmentzbb2017-09-061-1/+1
* Enable proper parsing of nested simlpe-buses on Marvell platformszbb2017-09-061-3/+4
* Parse EHCI windows on Marvell platformszbb2017-09-061-0/+1
* Fix USB3.0 decoding windows on Armada38xzbb2017-09-061-2/+2
* Move the IO Window Control Register defines out of the ARMADA38X ifdef.loos2017-09-061-12/+12
* Add the Marvell SDHCI controller to the list of supported devices inloos2017-09-061-0/+1
* Add the SDHCI Address Decoder registers and routines for ARMADA 38X.loos2017-09-062-1/+69
* Optimize Armada38x low-level MBUS settingszbb2017-09-063-0/+53
* Add PL310 platform initialization for Armada 38xzbb2017-09-062-0/+75
* Make fdt_pm_mask_table internal to the Marvell code, it's unued anywhereandrew2017-09-061-1/+6
* Add dummy functions for Marvell SoC's not equipped with AHCIwma2017-09-061-3/+23
* Add support for AHCI on ARMADA38Xwma2017-09-061-0/+1
* Setup decoding windows for ARMADA38Xwma2017-09-062-0/+64
* Fix node detection for MBUS windows configurationwma2017-09-061-0/+4
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