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authorzbb <zbb@FreeBSD.org>2017-06-08 16:46:38 +0000
committerLuiz Souza <luiz@netgate.com>2017-09-06 11:38:46 -0500
commite48eec16993d3566b12e4b98a78160bb46b888b8 (patch)
tree8498fa43eb40da8aeed4a821f03077865bb5b364 /sys/arm/mv
parent48ea838d60d9e9c84534c5545a24670e0a8128b3 (diff)
downloadFreeBSD-src-e48eec16993d3566b12e4b98a78160bb46b888b8.zip
FreeBSD-src-e48eec16993d3566b12e4b98a78160bb46b888b8.tar.gz
Add reset capability to mv_rtc driver
This commit enables optional reset of the RTC, in case its registers' contents did not sustain the reboot or power-off/on sequence. Without it, further usage of RTC is impossible (e.g. writing values to RTC_TIME register will not succeed). The reset is performed only if Clock Correction register does not comprise RTC_NOMINAL_TIMING, what helps to distinguish, whether the software configured RTC before or it comprises the default value. Submitted by: Bartosz Szczepanek <bsz@semihalf.com> Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D10900 (cherry picked from commit 15a9261debaaa6a9a0b6726589097f74c1171e8e)
Diffstat (limited to 'sys/arm/mv')
-rw-r--r--sys/arm/mv/armada38x/rtc.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/sys/arm/mv/armada38x/rtc.c b/sys/arm/mv/armada38x/rtc.c
index 8b3821c..834c0e4 100644
--- a/sys/arm/mv/armada38x/rtc.c
+++ b/sys/arm/mv/armada38x/rtc.c
@@ -56,6 +56,18 @@ __FBSDID("$FreeBSD$");
#define RTC_STATUS 0x0
#define RTC_TIME 0xC
+#define RTC_TEST_CONFIG 0x1C
+#define RTC_IRQ_1_CONFIG 0x4
+#define RTC_IRQ_2_CONFIG 0x8
+#define RTC_ALARM_1 0x10
+#define RTC_ALARM_2 0x14
+#define RTC_CLOCK_CORR 0x18
+
+#define RTC_NOMINAL_TIMING 0x2000
+#define RTC_NOMINAL_TIMING_MASK 0x7fff
+
+#define RTC_STATUS_ALARM1_MASK 0x1
+#define RTC_STATUS_ALARM2_MASK 0x2
#define MV_RTC_LOCK(sc) mtx_lock(&(sc)->mutex)
#define MV_RTC_UNLOCK(sc) mtx_unlock(&(sc)->mutex)
@@ -103,6 +115,43 @@ static devclass_t mv_rtc_devclass;
DRIVER_MODULE(mv_rtc, simplebus, mv_rtc_driver, mv_rtc_devclass, 0, 0);
+static void
+mv_rtc_reset(device_t dev)
+{
+ struct mv_rtc_softc *sc;
+
+ sc = device_get_softc(dev);
+
+ /* Reset Test register */
+ mv_rtc_reg_write(sc, RTC_TEST_CONFIG, 0);
+ DELAY(500000);
+
+ /* Reset Time register */
+ mv_rtc_reg_write(sc, RTC_TIME, 0);
+ DELAY(62);
+
+ /* Reset Status register */
+ mv_rtc_reg_write(sc, RTC_STATUS, (RTC_STATUS_ALARM1_MASK | RTC_STATUS_ALARM2_MASK));
+ DELAY(62);
+
+ /* Turn off Int1 and Int2 sources & clear the Alarm count */
+ mv_rtc_reg_write(sc, RTC_IRQ_1_CONFIG, 0);
+ mv_rtc_reg_write(sc, RTC_IRQ_2_CONFIG, 0);
+ mv_rtc_reg_write(sc, RTC_ALARM_1, 0);
+ mv_rtc_reg_write(sc, RTC_ALARM_2, 0);
+
+ /* Setup nominal register access timing */
+ mv_rtc_reg_write(sc, RTC_CLOCK_CORR, RTC_NOMINAL_TIMING);
+
+ /* Reset Time register */
+ mv_rtc_reg_write(sc, RTC_TIME, 0);
+ DELAY(10);
+
+ /* Reset Status register */
+ mv_rtc_reg_write(sc, RTC_STATUS, (RTC_STATUS_ALARM1_MASK | RTC_STATUS_ALARM2_MASK));
+ DELAY(50);
+}
+
static int
mv_rtc_probe(device_t dev)
{
@@ -198,6 +247,12 @@ mv_rtc_settime(device_t dev, struct timespec *ts)
MV_RTC_LOCK(sc);
+ if ((mv_rtc_reg_read(sc, RTC_CLOCK_CORR) & RTC_NOMINAL_TIMING_MASK) !=
+ RTC_NOMINAL_TIMING) {
+ /* RTC was not resetted yet */
+ mv_rtc_reset(dev);
+ }
+
/*
* According to errata FE-3124064, Write to RTC TIME register
* may fail. As a workaround, before writing to RTC TIME register,
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