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author | zbb <zbb@FreeBSD.org> | 2017-05-25 14:25:05 +0000 |
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committer | Luiz Souza <luiz@netgate.com> | 2017-09-06 11:38:23 -0500 |
commit | 44966a2f7132d312cbd8c62f86e422235a26bd0b (patch) | |
tree | ddaf7bb965c015dcdba863dc652b588f7c8b5737 /sys/arm/mv | |
parent | ccb49fedafb1ad914d209691f607d2a0bbd50d8a (diff) | |
download | FreeBSD-src-44966a2f7132d312cbd8c62f86e422235a26bd0b.zip FreeBSD-src-44966a2f7132d312cbd8c62f86e422235a26bd0b.tar.gz |
Add workaround for CESA MBUS windows with 4GB DRAM
Armada 38x SoC's equipped with 4GB DRAM suffer freeze
during CESA operation, if MBUS window opened at given
DRAM CS reaches end of the address space. Apply a workaround
by setting the window size to the closest possible
value, i.e. divide it by 2 (it has to be power-of-2).
Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Differential revision: https://reviews.freebsd.org/D10724
(cherry picked from commit 5fe68cd90c3b9cb2930e07d16f46cd91b1f05798)
Diffstat (limited to 'sys/arm/mv')
-rw-r--r-- | sys/arm/mv/mv_common.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/sys/arm/mv/mv_common.c b/sys/arm/mv/mv_common.c index d3dc599..b05040d 100644 --- a/sys/arm/mv/mv_common.c +++ b/sys/arm/mv/mv_common.c @@ -1126,6 +1126,7 @@ static void decode_win_cesa_setup(u_long base) { uint32_t br, cr; + uint64_t size; int i, j; for (i = 0; i < MV_WIN_CESA_MAX; i++) { @@ -1138,7 +1139,21 @@ decode_win_cesa_setup(u_long base) if (ddr_is_active(i)) { br = ddr_base(i); - cr = (((ddr_size(i) - 1) & 0xffff0000) | + size = ddr_size(i); +#ifdef SOC_MV_ARMADA38X + /* + * Armada 38x SoC's equipped with 4GB DRAM + * suffer freeze during CESA operation, if + * MBUS window opened at given DRAM CS reaches + * end of the address space. Apply a workaround + * by setting the window size to the closest possible + * value, i.e. divide it by 2. + */ + if (size + ddr_base(i) == 0x100000000ULL) + size /= 2; +#endif + + cr = (((size - 1) & 0xffff0000) | (ddr_attr(i) << IO_WIN_ATTR_SHIFT) | (ddr_target(i) << IO_WIN_TGT_SHIFT) | IO_WIN_ENA_MASK); |