diff options
| author | zbb <zbb@FreeBSD.org> | 2017-06-13 18:46:29 +0000 |
|---|---|---|
| committer | Luiz Souza <luiz@netgate.com> | 2017-09-06 11:40:17 -0500 |
| commit | 3de7f8c40f770b6401eff1375ceaf273ca452eb6 (patch) | |
| tree | 1bc05da9d9b0e8a91dfee2ccf913749fd18483cd /sys/arm/mv | |
| parent | ecc866f94eb094416df46451df09d2adad129f56 (diff) | |
| download | FreeBSD-src-3de7f8c40f770b6401eff1375ceaf273ca452eb6.zip FreeBSD-src-3de7f8c40f770b6401eff1375ceaf273ca452eb6.tar.gz | |
Introduce Armada 38x/XP network controller support
This patch contains a new driver for the network unit of Marvell
Armada 38x/XP SoCs, called NETA. This support was thoroughly tested
and optimised in terms of stability and performance. Additional
hardware features, like Buffer Management (BM) or Parser and Classifier
(PnC) will be progressively supported as needed.
Submitted by: Fabien Thomas <fabien.thomas@stormshield.eu>
Arnaud Ysmal <arnaud.ysmal@stormshield.eu>
Zbigniew Bodek <zbb@semihalf.com>
Michal Mazur <mkm@semihalf.com>
Bartosz Szczepanek <bsz@semihalf.com>
Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield (main development)
Netgate (cleanup and upstreaming)
Differential revision: https://reviews.freebsd.org/D10706
(cherry picked from commit 3e7c6ed5082a0bc9bd208a60cc4f54c43c1b4ef7)
Diffstat (limited to 'sys/arm/mv')
| -rw-r--r-- | sys/arm/mv/files.mv | 2 | ||||
| -rw-r--r-- | sys/arm/mv/mv_common.c | 17 | ||||
| -rw-r--r-- | sys/arm/mv/mvwin.h | 4 |
3 files changed, 23 insertions, 0 deletions
diff --git a/sys/arm/mv/files.mv b/sys/arm/mv/files.mv index 4d70d29..b37a2a6 100644 --- a/sys/arm/mv/files.mv +++ b/sys/arm/mv/files.mv @@ -24,6 +24,8 @@ arm/mv/timer.c optional !soc_mv_armada38x dev/cesa/cesa.c optional cesa dev/iicbus/twsi/mv_twsi.c optional twsi dev/mge/if_mge.c optional mge +dev/neta/if_mvneta_fdt.c optional neta fdt +dev/neta/if_mvneta.c optional neta mdio mii dev/nand/nfc_mv.c optional nand dev/mvs/mvs_soc.c optional mvs dev/uart/uart_dev_ns8250.c optional uart diff --git a/sys/arm/mv/mv_common.c b/sys/arm/mv/mv_common.c index 7695c96..efe9b6f 100644 --- a/sys/arm/mv/mv_common.c +++ b/sys/arm/mv/mv_common.c @@ -96,6 +96,7 @@ static void decode_win_cesa_setup(u_long); static void decode_win_usb_setup(u_long); static void decode_win_usb3_setup(u_long); static void decode_win_eth_setup(u_long); +static void decode_win_neta_setup(u_long); static void decode_win_sata_setup(u_long); static void decode_win_ahci_setup(u_long); static void decode_win_sdhci_setup(u_long); @@ -107,6 +108,7 @@ static void decode_win_cesa_dump(u_long); static void decode_win_usb_dump(u_long); static void decode_win_usb3_dump(u_long); static void decode_win_eth_dump(u_long base); +static void decode_win_neta_dump(u_long base); static void decode_win_idma_dump(u_long base); static void decode_win_xor_dump(u_long base); static void decode_win_ahci_dump(u_long base); @@ -152,6 +154,7 @@ struct soc_node_spec { static struct soc_node_spec soc_nodes[] = { { "mrvl,ge", &decode_win_eth_setup, &decode_win_eth_dump }, + { "marvell,armada-370-neta", &decode_win_neta_setup, &decode_win_neta_dump }, { "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump }, { "marvell,orion-ehci", &decode_win_usb_setup, &decode_win_usb_dump }, { "marvell,armada-380-xhci", &decode_win_usb3_setup, &decode_win_usb3_dump }, @@ -1443,6 +1446,20 @@ decode_win_eth_setup(u_long base) } } +static void +decode_win_neta_dump(u_long base) +{ + + decode_win_eth_dump(base + MV_WIN_NETA_OFFSET); +} + +static void +decode_win_neta_setup(u_long base) +{ + + decode_win_eth_setup(base + MV_WIN_NETA_OFFSET); +} + static int decode_win_eth_valid(void) { diff --git a/sys/arm/mv/mvwin.h b/sys/arm/mv/mvwin.h index 65a6eb9..b8c36b3 100644 --- a/sys/arm/mv/mvwin.h +++ b/sys/arm/mv/mvwin.h @@ -229,6 +229,9 @@ #define MV_WIN_USB3_BASE(n) (0x8 * (n) + 0x4004) #define MV_WIN_USB3_MAX 8 +#define MV_WIN_NETA_OFFSET 0x2000 +#define MV_WIN_NETA_BASE(n) MV_WIN_ETH_BASE(n) + MV_WIN_NETA_OFFSET + #define MV_WIN_ETH_BASE(n) (0x8 * (n) + 0x200) #define MV_WIN_ETH_SIZE(n) (0x8 * (n) + 0x204) #define MV_WIN_ETH_REMAP(n) (0x4 * (n) + 0x280) @@ -325,6 +328,7 @@ /* IO Window Control Register fields */ #define IO_WIN_SIZE_SHIFT 16 #define IO_WIN_SIZE_MASK 0xFFFF +#define IO_WIN_COH_ATTR_MASK (0xF << 12) #define IO_WIN_ATTR_SHIFT 8 #define IO_WIN_ATTR_MASK 0xFF #define IO_WIN_TGT_SHIFT 4 |
