diff options
author | zbb <zbb@FreeBSD.org> | 2017-06-08 16:57:06 +0000 |
---|---|---|
committer | Luiz Souza <luiz@netgate.com> | 2017-09-06 11:40:00 -0500 |
commit | ecc866f94eb094416df46451df09d2adad129f56 (patch) | |
tree | 674364b61a2398e0b88817819129b09709eed549 /sys/arm/mv | |
parent | 3b24a7b3a3fc4dd95fd14a8d10b6db01f2f8b50b (diff) | |
download | FreeBSD-src-ecc866f94eb094416df46451df09d2adad129f56.zip FreeBSD-src-ecc866f94eb094416df46451df09d2adad129f56.tar.gz |
Add function to dump PCIE MBUS decoding windows and bars
This commit allows to dump PCIE MBUS and bars configuration
for Marvell platforms.
Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Netgate
Differential revision: https://reviews.freebsd.org/D10908
(cherry picked from commit 3086783967281c5ed4f76508424074a7c1527ba6)
Diffstat (limited to 'sys/arm/mv')
-rw-r--r-- | sys/arm/mv/mv_common.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/sys/arm/mv/mv_common.c b/sys/arm/mv/mv_common.c index 9265b38..7695c96 100644 --- a/sys/arm/mv/mv_common.c +++ b/sys/arm/mv/mv_common.c @@ -111,6 +111,7 @@ static void decode_win_idma_dump(u_long base); static void decode_win_xor_dump(u_long base); static void decode_win_ahci_dump(u_long base); static void decode_win_sdhci_dump(u_long); +static void decode_win_pcie_dump(u_long); static int fdt_get_ranges(const char *, void *, int, int *, int *); #ifdef SOC_MV_ARMADA38X @@ -160,7 +161,7 @@ static struct soc_node_spec soc_nodes[] = { { "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump }, { "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump }, { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump }, - { "mrvl,pcie", &decode_win_pcie_setup, NULL }, + { "mrvl,pcie", &decode_win_pcie_setup, &decode_win_pcie_dump }, { NULL, NULL, NULL }, }; @@ -670,6 +671,8 @@ WIN_REG_BASE_IDX_WR(win_pcie, cr, MV_WIN_PCIE_CTRL); WIN_REG_BASE_IDX_WR(win_pcie, br, MV_WIN_PCIE_BASE); WIN_REG_BASE_IDX_WR(win_pcie, remap, MV_WIN_PCIE_REMAP); WIN_REG_BASE_IDX_RD(pcie_bar, br, MV_PCIE_BAR_BASE); +WIN_REG_BASE_IDX_RD(pcie_bar, brh, MV_PCIE_BAR_BASE_H); +WIN_REG_BASE_IDX_RD(pcie_bar, cr, MV_PCIE_BAR_CTRL); WIN_REG_BASE_IDX_WR(pcie_bar, br, MV_PCIE_BAR_BASE); WIN_REG_BASE_IDX_WR(pcie_bar, brh, MV_PCIE_BAR_BASE_H); WIN_REG_BASE_IDX_WR(pcie_bar, cr, MV_PCIE_BAR_CTRL); @@ -1450,6 +1453,22 @@ decode_win_eth_valid(void) /************************************************************************** * PCIE windows routines **************************************************************************/ +static void +decode_win_pcie_dump(u_long base) +{ + int i; + + printf("PCIE windows base 0x%08lx\n", base); + for (i = 0; i < MV_WIN_PCIE_MAX; i++) + printf("PCIE window#%d: cr 0x%08x br 0x%08x remap 0x%08x\n", + i, win_pcie_cr_read(base, i), + win_pcie_br_read(base, i), win_pcie_remap_read(base, i)); + + for (i = 0; i < MV_PCIE_BAR_MAX; i++) + printf("PCIE bar#%d: cr 0x%08x br 0x%08x brh 0x%08x\n", + i, pcie_bar_cr_read(base, i), + pcie_bar_br_read(base, i), pcie_bar_brh_read(base, i)); +} void decode_win_pcie_setup(u_long base) |