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* Have all programmer init functions register bus masters/programmersCarl-Daniel Hailfinger2011-12-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All programmer types (Parallel, SPI, Opaque) now register themselves into a generic programmer list and probing is now programmer-centric instead of chip-centric. Registering multiple SPI/... masters at the same time is now possible without any problems. Handling multiple flash chips is still unchanged, but now we have the infrastructure to deal with "dual BIOS" and "one flash behind southbridge and one flash behind EC" sanely. A nice side effect is that this patch kills quite a few global variables and improves the situation for libflashrom. Hint for developers: struct {spi,par,opaque}_programmer now have a void *data pointer to store any additional programmer-specific data, e.g. hardware configuration info. Note: flashrom -f -c FOO -r forced_read.bin does not work anymore. We have to find an architecturally clean way to solve this. Corresponding to flashrom svn r1475. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-16/+18
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use struct flashctx instead of struct flashchip for flash chip accessCarl-Daniel Hailfinger2011-12-141-4/+4
| | | | | | | | | | | | | | | | | | | | | | Struct flashchip is used only for the flashchips array and for operations which do not access hardware, e.g. printing a list of supported flash chips. struct flashctx (flash context) contains all data available in struct flashchip, but it also contains runtime information like mapping addresses. struct flashctx is expected to grow additional members over time, a prime candidate being programmer info. struct flashctx contains all of struct flashchip with identical member layout, but struct flashctx has additional members at the end. The separation between struct flashchip/flashctx shrinks the memory requirement of the big flashchips array and allows future extension of flashctx without having to worry about bloat. Corresponding to flashrom svn r1473. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Unsignify lengths and addresses in chip functions and structsStefan Tauner2011-11-231-2/+4
| | | | | | | | | | Push those changes forward where needed to prevent new sign conversion warnings where possible. Corresponding to flashrom svn r1470. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: fix ich_init_opcodes() calls in ich_init_spi()Stefan Tauner2011-11-131-2/+2
| | | | | | | | | | | | | | By calling it early ichspi_lock was not set up correctly in accordance with the corresponding register, hence ich_init_opcodes() was always trying to programming the opcodes instead of reading them in from the opmenu in case of a locked down configuration. Thanks to Jonathan A. Kollasch for reporting this bug. Corresponding to flashrom svn r1464. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵Carl-Daniel Hailfinger2011-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | registered All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Corresponding to flashrom svn r1463. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* ichspi: print flash descriptor dependent information only when it is validStefan Tauner2011-11-081-26/+33
| | | | | | | | | Also, fix some coding style issues. Corresponding to flashrom svn r1462. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add support for Intel Hardware SequencingStefan Tauner2011-11-081-10/+292
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the new opaque programmer framework this patch adds support for Intel Hardware Sequencing on ICH8 and its successors. By default (or when setting the ich_spi_mode option to auto) the module tries to use swseq and only activates hwseq if need be: - if important opcodes are inaccessible due to lockdown - if more than one flash chip is attached. The other options (swseq, hwseq) select the respective mode (if possible). A general description of Hardware Sequencing can be found in this blog entry: http://blogs.coreboot.org/blog/2011/06/11/gsoc-2011-flashrom-part-1/ Besides adding hwseq this patch also introduces these unrelated changes: - Fix enable_flash_ich_dc_spi to pass ERROR_FATAL from ich_init_spi. The whole error handling looks a bit odd to me, so this patch does change very little. Also, it does not touch the tunnelcreek method, which should be refactored anyway. - Add null-pointer guards to find_opcode and find_preop to matches the other opcode methods better: curopcodes == NULL has some meaning and is actively used/checked in other functions. TODO: adding real documentation when we have a directory for it Corresponding to flashrom svn r1461. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: use a variable to distinguish ich generations instead of ↵Stefan Tauner2011-11-061-52/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_programmer->type The type member is enough most of the time to derive the wanted information, but - not always (e.g. ich_set_bbar), - only available after registration, which we want to delay till the end of init, and - we really want to distinguish between chipset version-grained attributes which are not reflected by the registered programmer. Hence this patch introduces a new static variable which is set up early by the init functions and allows us to get rid of all "switch (spi_programmer->type)" in ichspi.c. We reuse the enum introduced for descriptor mode for the type of the new variable. Previously magic numbers were passed by chipset_enable wrappers. Now they use the enumeration items too. To get this working the enum definition had to be moved to programmer.h. Another noteworthy detail: previously we have checked for a valid programmer/ich generation all over the place. I have removed those checks and added one single check in the init method. Calling any function of a programmer without executing the init method first, is undefined behavior. Corresponding to flashrom svn r1460. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add (partially) dead support code for Intel Hardware SequencingStefan Tauner2011-10-201-13/+84
| | | | | | | | | | This was done to ease the review. Another patch will hook up (and explain) this code later. Corresponding to flashrom svn r1452. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: inform the user about the consequences of the security override strapStefan Tauner2011-09-181-0/+6
| | | | | | | | | | | | | | Ibex Peak SPI Programming Guide: The PCH has a mechanism to set up to 5 address ranges from HOST access. These are defined in PR0, PR1, PR2, PR3 and PR4 in the PCH EDS. These address ranges are NOT unlocked by assertion of Flash descriptor Override. Also, the datasheets mention the bit in their description of FRAP but not PR[N]. Corresponding to flashrom svn r1449. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: unlock PR register restrictions on ICH8+ if not locked downStefan Tauner2011-09-171-0/+27
| | | | | | | | | | | Tested-by: Shailendra Sodhi (predecessor/proof of concept patch) http://www.flashrom.org/pipermail/flashrom/2011-August/007717.html Corresponding to flashrom svn r1447. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add prettyprinting for PR registers on ICH8+Stefan Tauner2011-09-171-14/+30
| | | | | | | Corresponding to flashrom svn r1446. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: don't touch the nonexistent(?) BBAR register on ICH8Stefan Tauner2011-09-171-14/+12
| | | | | | | | | | | | | There is no sign of BBAR (BIOS Base Address Configuration Register) in the public datasheet (or specification update) of the ICH8. Also, the offset of that register has changed between ICH7 (SPIBAR + 50h) and ICH9 (SPIBAR + A0h), so we have no clue if or where it is on ICH8. Better don't try to touch it at all and assume/hope it is 0. Corresponding to flashrom svn r1445. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: improve prettyprint_opcodesStefan Tauner2011-09-171-12/+23
| | | | | | | | | Add headers for the columns and some decoding into human readable format. Corresponding to flashrom svn r1444. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi: add ICH/PCH flash descriptor decoding via FDOC/FDODStefan Tauner2011-09-151-11/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the work of Matthias 'mazzoo' Wenzel this patch adds pretty printing of those ICH/PCH flash descriptor sections that are cached/mapped by the chipset (and which are therefore reachable via FDOC/FDOD registers). this includes the following: - content section: describes the image and some generic properties (number of sections, offset of sections, PCH/ICH and MCH/PROC strap offsets and lengths) - component section: identify the different SPI flash chips and their capabilities. - region section similarly to a partition table this describes the different regions. the content of FLREG* is derived from this section. - master section defines SPI master (host, ME, GbE) access rights of the individual regions. the content of PR* is derived from this section. this is only a part of the data included in the descriptor. other information can be retrieved from a complete binary dump of the descriptor region only. this patch also adds macros and pretty printing for "Vendor Specific Component Capabilities" registers: there are two of them: lower and upper. they describe the properties of the address space divided by FPBA (which allows to use multiple flash chips or partitions with different properties). the properties of all supported flash chips (together with their RDIDs) are stored in the same format in table in a descriptor section (which is used by the ME apparently). a later patch will use the macros outside of ichspi.c which is the reason why the prettyprinting function and the register bit macros are not defined in ichspi.c but ich_descriptors.h (else they would be moved in the follow-up patch). because this patch relies on (compiler) implementation-specific layouting of bit-fields, it checks for correct layout before taking any action on runtime. Corresponding to flashrom svn r1443. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove unneeded inclusions of chipdrivers.hStefan Tauner2011-08-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | This is related to the spi split patch as discussed in: http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 the old commit (r914) log notes: "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" there still remain a few cases where chipdrivers.h is needed: dediprog.c (spi_read_chunked and spi_write_chunked) it87spi.c (due to spi_write_enable and spi_read_status_register) wbsio_spi.c (spi_programmer registration only) besides that, there are also non-spi files that do not need it. also, add flash.h to chipdrivers.h because it uses some types of it and remove flashchips.h from print.c Corresponding to flashrom svn r1414. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi.c: refactor filling and reading the fdata/spid registersStefan Tauner2011-08-091-78/+57
| | | | | | | | | | | | - add ich_fill_data to fill the chipset registers from an array - add ich_read_data to copy the data from the chipset register into an array - replace the existing code with calls to those functions - minor cosmetic changes Corresponding to flashrom svn r1409. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Random whitespace and coding-style fixesUwe Hermann2011-07-281-1/+1
| | | | | | | | | | | | Also, indentation fixes, e.g. due to conversion to msg_*, use ARRAY_SIZE where possible, wrap overly long line, etc. Compile-tested. There should be no functional changes. Corresponding to flashrom svn r1397. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-1/+1
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* ichspi.c: do not print PBR[3] for ICH7 because it does not existStefan Tauner2011-07-241-1/+1
| | | | | | | | | | | | | Intel document 307013 (ICH7 datasheet) section 21.1.9 does only define PBR[0] (at SPIBAR + 60h) to PBR[2] (SPIBAR + 68h). SPIBAR + 6Ch and following are not defined, but we were printing them as PBR[3] anyway. i could not find any references to PBR[3] in documentation of other related chips (NM10, atom e6xx) either, hence kill it. Corresponding to flashrom svn r1381. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: print FADDR in ich_init_spiStefan Tauner2011-07-071-0/+2
| | | | | | | | | | We print the address registers for ICH7 and VIA at init. We should do so for ICH9 too. Corresponding to flashrom svn r1365. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: David Hendricks <dhendrix@google.com>
* ichspi.c: preserve reserved bits in address registersStefan Tauner2011-07-011-5/+8
| | | | | | | Corresponding to flashrom svn r1362. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add FPB (Flash Partition Boundary) macros and init printingStefan Tauner2011-07-011-0/+7
| | | | | | | Corresponding to flashrom svn r1361. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: simplify ich_set_bbarStefan Tauner2011-07-011-27/+21
| | | | | | | | | Less code, documenting better what the differences are (i.e. offset of BBAR only). Corresponding to flashrom svn r1360. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: make REGWRITE* macros saferStefan Tauner2011-07-011-3/+3
| | | | | | | | | | | '+' does have a quite high precedence so "calling" those macros with a term including weaker operators in the off parameter may have unexpected consequences. Corresponding to flashrom svn r1359. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add missing ICH9 register macros and eliminate magic numbersStefan Tauner2011-06-121-24/+33
| | | | | | | | | | | - add macros for FRAP, FREG0, PR0-PR4 and BBAR - eliminate magic numbers representing those registers and some other bits too - remove printing out the contents of FDOC because it is useless Corresponding to flashrom svn r1334. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Use the max_data_read field of the new spi_programmer struct to simplify ↵Stefan Tauner2011-06-111-25/+25
| | | | | | | | | | | | run_opcode Also, explain the transformation of the read/write array/count in ich_spi_send_command better. Corresponding to flashrom svn r1333. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add macros and pretty printing for HSFS and HSFCStefan Tauner2011-06-111-12/+62
| | | | | | | Corresponding to flashrom svn r1330. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: add pretty printing for SSFS+SSFC and the OPCODE structStefan Tauner2011-06-111-6/+51
| | | | | | | Corresponding to flashrom svn r1329. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* ichspi.c: improve macros for SSFS and SSFC bitsStefan Tauner2011-06-111-21/+36
| | | | | | | | | | | | | | | - introduce offset macros and use them to (re)define the existing mask macros - fix masks of SSFC_COP, SSFC_DBC, SSFC_SCF (were single-bit masks erroneously) - add comments - rename SSFS_CDS to SSFS_FDONE (abbr. used in datasheet; not in SSFS but HSFS) - use those for refactoring and magic number elemination. following patch uses them for pretty printing. Corresponding to flashrom svn r1328. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Small fixesStefan Tauner2011-05-281-4/+5
| | | | | | | | | | | - missing spaces in code and output - improved documentation/naming/output - missing line breaks in spi probing functions Corresponding to flashrom svn r1321. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi: fix detection of unused regionsJoshua Roys2011-05-261-1/+1
| | | | | | | Corresponding to flashrom svn r1319. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Whitespace, documentation and other small stuffStefan Tauner2011-05-191-25/+30
| | | | | | | | | | | | | This patch combines three previously posted patches in a revised form. one is even stolen from Stefan Reinauer (remove umlauts from man page). Corresponding to flashrom svn r1317. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Kill central list of SPI programmersMichael Karcher2011-05-111-14/+43
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Corresponding to flashrom svn r1299. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Factor out SPI write/read chunking wrappersMichael Karcher2011-05-111-20/+0
| | | | | | | Corresponding to flashrom svn r1298. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert MMIO space writes on shutdown as neededCarl-Daniel Hailfinger2011-05-031-16/+34
| | | | | | | | | | | | | | | | | | Reversible MMIO space writes now use rmmio_write*(). Reversible PCI MMIO space writes now use pci_rmmio_write*(). If a MMIO value needs to be queued for restore without writing it, use rmmio_val*(). MMIO space writes which are one-shot (e.g. communication with some chip) should continue to use the permanent mmio_write* variants. Corresponding to flashrom svn r1292. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> David tested it successfully on some NM10/ICH7 platforms which switch between SPI and LPC targets (x86 BIOS ROM vs. EC firmware ROM). Acked-by: David Hendricks <dhendrix@google.com>
* Improve output in case run_opcode failsStefan Tauner2011-04-291-5/+20
| | | | | | | Corresponding to flashrom svn r1291. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* ichspi: Increase timeout to 60s for atomic operationsMichael Karcher2011-04-291-4/+18
| | | | | | | Corresponding to flashrom svn r1290. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Proper error handling for ICH/VIA SPICarl-Daniel Hailfinger2011-03-171-22/+80
| | | | | | | | | | | | | | Use 16-bit values for bit masks in 16-bit registers. Check for SPI Cycle In Progress and wait up to 60 ms. Do not touch reserved bits. Reduce SPI cycle timeout from 60 s to 60 ms. Clear transaction errors caused by our own SPI accesses. Add better debugging in case the hardware misbehaves. Corresponding to flashrom svn r1281. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
* Convince compilers to put constant data into the .rodata sectionMathias Krause2011-01-171-2/+2
| | | | | | | | | | | | | | | | This patch reduces the stack usage by declaring 'const' stack variables as 'static const' so they end up in the .rodata section instead of being copied from there to the stack for every invocation of the corresponding function. As a plus we end up in having a smaller binary as the "copy from .rodata to stack" code isn't emitted by the compiler any more (roughly -100 bytes). Corresponding to flashrom svn r1252. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Dump all VIA SPI registers like for ICH7Carl-Daniel Hailfinger2010-11-241-7/+49
| | | | | | | | | | Handle BBAR on VIA. Handle SPI lockdown on VIA. Corresponding to flashrom svn r1236. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Rudolf Marek <r.marek@assembler.cz>
* Implement on-the-fly reprogramming of the ICH SPI OPCODE tableHelge Wagner2010-10-051-20/+79
| | | | | | | Corresponding to flashrom svn r1193. Signed-off-by: Helge Wagner <helge.wagner@ge.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Intel 5 Series / 3400 Series chipsetsHelge Wagner2010-08-111-1/+3
| | | | | | | | | | | (At least) for the QM57 which i have tested an additional patch was needed as some reserved bits in the "Software Sequencing Flash Control Register" (SSFC) needs to be programmed to 1 in the QM57. Corresponding to flashrom svn r1137. Signed-off-by: Helge Wagner <helge.wagner@ge.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Move Intel SPI initialisation to ichspi.cMichael Karcher2010-07-221-3/+210
| | | | | | | | | | | Smarter version could decide whether SPI is vital or not depending on straps. Straps are currently implemented for ICH7. EP80579 is in the comment, PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI". Corresponding to flashrom svn r1098. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Use generic unlocking infrastructure for SPI chipsCarl-Daniel Hailfinger2010-07-141-1/+0
| | | | | | | | | Actually check if the unlock worked instead of just assuming it worked. Corresponding to flashrom svn r1082. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Convert SPI chips to partial writeCarl-Daniel Hailfinger2010-07-141-23/+2
| | | | | | | | | | However, wrap the write functions in a compat layer to allow converting the rest of flashrom later. Tested on Intel NM10 by David Hendricks. Corresponding to flashrom svn r1080. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Kill global variables, constants and functions if local scope sufficesCarl-Daniel Hailfinger2010-07-031-12/+14
| | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Corresponding to flashrom svn r1068. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* ichspi: try harder to conform to address restrictionsCarl-Daniel Hailfinger2010-05-281-1/+49
| | | | | | | | | | | | | | ICH SPI can enforce address restrictions for all accesses which take an address (well, it could if the chipset implementation was not broken). Since exploiting the broken implementation is harder than conforming to the address restrictions wherever possible, conform to the address restrictions instead. This patch eliminates a lot of transaction errors people were seeing on chip probe. Corresponding to flashrom svn r1016. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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