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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2011-12-20 00:19:29 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2011-12-20 00:19:29 +0000
commitc40cff7b86848f5b248d7fcf20f7d517b60c385d (patch)
tree7f9db61c7b4868e513c4702cfe57bb35ae695266 /ichspi.c
parent8a3c60cdd0e5632173567923ae1927763e31e857 (diff)
downloadast2050-flashrom-c40cff7b86848f5b248d7fcf20f7d517b60c385d.zip
ast2050-flashrom-c40cff7b86848f5b248d7fcf20f7d517b60c385d.tar.gz
Have all programmer init functions register bus masters/programmers
All programmer types (Parallel, SPI, Opaque) now register themselves into a generic programmer list and probing is now programmer-centric instead of chip-centric. Registering multiple SPI/... masters at the same time is now possible without any problems. Handling multiple flash chips is still unchanged, but now we have the infrastructure to deal with "dual BIOS" and "one flash behind southbridge and one flash behind EC" sanely. A nice side effect is that this patch kills quite a few global variables and improves the situation for libflashrom. Hint for developers: struct {spi,par,opaque}_programmer now have a void *data pointer to store any additional programmer-specific data, e.g. hardware configuration info. Note: flashrom -f -c FOO -r forced_read.bin does not work anymore. We have to find an architecturally clean way to solve this. Corresponding to flashrom svn r1475. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Diffstat (limited to 'ichspi.c')
-rw-r--r--ichspi.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/ichspi.c b/ichspi.c
index 6bcea45..163ecf1 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -635,7 +635,7 @@ static void ich_set_bbar(uint32_t min_addr)
/* Read len bytes from the fdata/spid register into the data array.
*
- * Note that using len > spi_programmer->max_data_read will return garbage or
+ * Note that using len > flash->pgm->spi.max_data_read will return garbage or
* may even crash.
*/
static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -653,7 +653,7 @@ static void ich_read_data(uint8_t *data, int len, int reg0_off)
/* Fill len bytes from the data array into the fdata/spid registers.
*
- * Note that using len > spi_programmer->max_data_write will trash the registers
+ * Note that using len > flash->pgm->spi.max_data_write will trash the registers
* following the data registers.
*/
static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -960,9 +960,9 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data)
{
/* max_data_read == max_data_write for all Intel/VIA SPI masters */
- uint8_t maxlength = spi_programmer->max_data_read;
+ uint8_t maxlength = flash->pgm->spi.max_data_read;
- if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+ if (ich_generation == CHIPSET_ICH_UNKNOWN) {
msg_perr("%s: unsupported chipset\n", __func__);
return -1;
}
@@ -1297,7 +1297,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
while (len > 0) {
- block_len = min(len, opaque_programmer->max_data_read);
+ block_len = min(len, flash->pgm->opaque.max_data_read);
ich_hwseq_set_addr(addr);
hsfc = REGREAD16(ICH9_REG_HSFC);
hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1336,7 +1336,7 @@ static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
while (len > 0) {
ich_hwseq_set_addr(addr);
- block_len = min(len, opaque_programmer->max_data_write);
+ block_len = min(len, flash->pgm->opaque.max_data_write);
ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
hsfc = REGREAD16(ICH9_REG_HSFC);
hsfc &= ~HSFC_FCYCLE; /* clear operation */
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