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authorStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2011-06-11 19:44:31 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2011-06-11 19:44:31 +0000
commitb2d5f6abbc0c5d24728cd036379649a9bf4e939c (patch)
tree5300a026e9a73d7efe641bb503f94afd4d35af55 /ichspi.c
parentf9a8da595d0961a7c5c899117d8e8dc7bdafaf42 (diff)
downloadast2050-flashrom-b2d5f6abbc0c5d24728cd036379649a9bf4e939c.zip
ast2050-flashrom-b2d5f6abbc0c5d24728cd036379649a9bf4e939c.tar.gz
Use the max_data_read field of the new spi_programmer struct to simplify run_opcode
Also, explain the transformation of the read/write array/count in ich_spi_send_command better. Corresponding to flashrom svn r1333. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'ichspi.c')
-rw-r--r--ichspi.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/ichspi.c b/ichspi.c
index 1cbff56..496b8c6 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -922,37 +922,31 @@ static int ich9_run_opcode(OPCODE op, uint32_t offset,
static int run_opcode(OPCODE op, uint32_t offset,
uint8_t datalength, uint8_t * data)
{
+ /* max_data_read == max_data_write for all Intel/VIA SPI masters */
+ uint8_t maxlength = spi_programmer->max_data_read;
+
+ if (spi_programmer->type == SPI_CONTROLLER_NONE) {
+ msg_perr("%s: unsupported chipset\n", __func__);
+ return -1;
+ }
+
+ if (datalength > maxlength) {
+ msg_perr("%s: Internal command size error for "
+ "opcode 0x%02x, got datalength=%i, want <=%i\n",
+ __func__, op.opcode, datalength, maxlength);
+ return SPI_INVALID_LENGTH;
+ }
+
switch (spi_programmer->type) {
case SPI_CONTROLLER_VIA:
- if (datalength > 16) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
- return ich7_run_opcode(op, offset, datalength, data, 16);
case SPI_CONTROLLER_ICH7:
- if (datalength > 64) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
- return ich7_run_opcode(op, offset, datalength, data, 64);
+ return ich7_run_opcode(op, offset, datalength, data, maxlength);
case SPI_CONTROLLER_ICH9:
- if (datalength > 64) {
- msg_perr("%s: Internal command size error for "
- "opcode 0x%02x, got datalength=%i, want <=16\n",
- __func__, op.opcode, datalength);
- return SPI_INVALID_LENGTH;
- }
return ich9_run_opcode(op, offset, datalength, data);
default:
- msg_perr("%s: unsupported chipset\n", __func__);
+ /* If we ever get here, something really weird happened */
+ return -1;
}
-
- /* If we ever get here, something really weird happened */
- return -1;
}
static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
@@ -1038,7 +1032,13 @@ static int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
}
}
- /* translate read/write array/count */
+ /* Translate read/write array/count.
+ * The maximum data length is identical for the maximum read length and
+ * for the maximum write length excluding opcode and address. Opcode and
+ * address are stored in separate registers, not in the data registers
+ * and are thus not counted towards data length. The only exception
+ * applies if the opcode definition (un)intentionally classifies said
+ * opcode incorrectly as non-address opcode or vice versa. */
if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) {
data = (uint8_t *) (writearr + 1);
count = writecnt - 1;
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