path: root/ichspi.c
diff options
authorStefan Tauner <>2011-09-18 15:15:31 +0000
committerStefan Tauner <>2011-09-18 15:15:31 +0000
commite3185c0599d77c06b9665c9721649b96108c894f (patch)
treea01dcf9a4d5caf86935037d9286c9d8b3a8ffaf6 /ichspi.c
parentd196e7c1387b30ac35e7b0f605c79823ac9b5ec9 (diff)
ichspi: inform the user about the consequences of the security override strap
Ibex Peak SPI Programming Guide: The PCH has a mechanism to set up to 5 address ranges from HOST access. These are defined in PR0, PR1, PR2, PR3 and PR4 in the PCH EDS. These address ranges are NOT unlocked by assertion of Flash descriptor Override. Also, the datasheets mention the bit in their description of FRAP but not PR[N]. Corresponding to flashrom svn r1449. Signed-off-by: Stefan Tauner <> Acked-by: Carl-Daniel Hailfinger <>
Diffstat (limited to 'ichspi.c')
1 files changed, 6 insertions, 0 deletions
diff --git a/ichspi.c b/ichspi.c
index e3a2d75..e30c267 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1325,6 +1325,12 @@ int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
if (tmp2 & HSFS_FDV)
ichspi_desc = 1;
+ if (!(tmp2 & HSFS_FDOPSS) && ichspi_desc)
+ msg_pinfo("The Flash Descriptor Security Override "
+ "Strap-Pin is set. Restrictions implied\n"
+ "by the FRAP and FREG registers are NOT in "
+ "effect. Please note that Protected\n"
+ "Range (PR) restrictions still apply.\n");
tmp2 = mmio_readw(ich_spibar + ICH9_REG_HSFC);
msg_pdbg("0x06: 0x%04x (HSFC)\n", tmp2);
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