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* Print machine check address for Book-E.jhibbits2015-11-301-0/+2
* Add PVR identifier for E6500, from the reference.jhibbits2015-09-091-0/+1
* Add machine check register printingjhibbits2015-07-041-0/+8
* Add a new CPU id for a POWER8 variant.nwhitehorn2014-07-061-1/+2
* Add hwpmc(4) support for the PowerPC 970 class processors, direct events.jhibbits2014-02-011-15/+21
* Add PMU-based CPU frequency scaling. This method is used on most Titaniumjhibbits2013-12-131-0/+4
* Add POWER7+ and POWER8 to the CPU ID table.nwhitehorn2013-09-171-0/+2
* Remove duplicate definition of SPR MMCR0.jhibbits2013-08-031-1/+0
* On Nintendo Wii CPUs, the mdp value will be garbage. Set it to NULLadrian2012-08-211-0/+1
* Let us manage differences of Book-E PowerPC variations i.e. vendor /raj2012-05-271-5/+12
* Provide SPR definitions for newer Book-E (E500mc, E5500, PPC465).raj2012-05-261-0/+36
* Unify SPR defines formatting, no funtional changes.raj2012-05-261-88/+87
* Implement hwpmc counting PMC support for PowerPC G4+ (MPC745x/MPC744x).jhibbits2011-12-241-6/+6
* o Add system versions for the P4040(E) and P4080(E).marcel2011-05-291-0/+4
* o Swap the SVR numbers for MPC8533 & MPC8533Emarcel2011-05-271-2/+10
* Fix handling of NX pages on capable CPUs. Thanks to kib for prodding menwhitehorn2011-01-131-0/+3
* Add CPU support code for the IBM Cell Broadband Engine.nwhitehorn2010-11-121-0/+4
* MFppc64:nwhitehorn2010-07-131-1/+19
* The NetBSD Foundation has granted permission to remove clause 3 and 4 fromjoel2010-03-031-7/+0
* Add SMP support on U3-based G5 systems. This does not yet work perfectly:nwhitehorn2009-10-231-4/+4
* Fix copy/paste typo in last revision. PMC0 control should be shifted 8nwhitehorn2009-06-231-1/+1
* Teach cpu_est_clockrate() about the G5's slightly different PMC. Thisnwhitehorn2009-06-171-1/+24
* Initial support for SMP on PowerPC MPC85xx.raj2009-05-211-0/+3
* PowerPC common SMP startup and time base rework.raj2009-05-141-2/+0
* Factor out platform dependent things unrelated to device drivers into anwhitehorn2009-05-141-0/+1
* Rework the way we get the cacheline size. Instead of having a table ofnwhitehorn2009-04-121-0/+2
* Add support for 64-bit PowerPC CPUs operating in the 64-bit bridge modenwhitehorn2009-04-041-0/+42
* Make MPC85xx LAW handling and reset routines aware of the MPC8548 variant.raj2009-03-131-0/+2
* Improve MPC85XX helper routines.raj2008-12-171-9/+9
* o Remove SPR_TSR & SPR_TCR for AIM.marcel2008-09-151-8/+23
* Move System Revision defines to a bit better place, add MPC8572 systems IDs.raj2008-04-261-9/+9
* Rework and extend PowerPC headers definitons towards Book-E/e500 CPUs support.raj2008-03-031-19/+148
* Teach PowerPC CPU identification routines to recognize e500 cores. Fix styleraj2008-02-251-0/+2
* - add definitions for MPC7447A/7448 (i.e. miniMac)grehan2005-02-041-1/+3
* /* -> /*- for license, minor formatting changesimp2005-01-071-1/+1
* Definitions for MPC7457 CPU type and HID0 bitsgrehan2004-02-091-0/+2
* - Update spr.hbenno2003-02-051-79/+196
* Rename the constants for the contents of the PVR register so as not tobenno2002-05-091-17/+17
* Commit of stuff that's been sitting in my tree for a while.benno2002-04-291-0/+360
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