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authornwhitehorn <nwhitehorn@FreeBSD.org>2009-10-23 03:17:02 +0000
committernwhitehorn <nwhitehorn@FreeBSD.org>2009-10-23 03:17:02 +0000
commit377d7d4bff1caea779545dac7fcafef606ce356c (patch)
tree5e11cfe8c1eb65542169c171b6a1b29a37ef196f /sys/powerpc/include/spr.h
parent127ea9fc8850c131fbdd4e1c4dfc06e77ab10f49 (diff)
downloadFreeBSD-src-377d7d4bff1caea779545dac7fcafef606ce356c.zip
FreeBSD-src-377d7d4bff1caea779545dac7fcafef606ce356c.tar.gz
Add SMP support on U3-based G5 systems. This does not yet work perfectly:
at least on my Xserve, getting the decrementer and timebase on APs to tick requires setting up a clock chip over I2C, which is not yet done. While here, correct the 64-bit tlbie function to set the CPU to 64-bit mode correctly. Hardware donated by: grehan
Diffstat (limited to 'sys/powerpc/include/spr.h')
-rw-r--r--sys/powerpc/include/spr.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h
index 4e55326..586a57b 100644
--- a/sys/powerpc/include/spr.h
+++ b/sys/powerpc/include/spr.h
@@ -50,7 +50,7 @@
#define mtspr64(reg,valhi,vallo,scratch) \
__asm __volatile(" \
mfmsr %0; \
- insrdi %0,1,1,0; \
+ insrdi %0,%5,1,0; \
mtmsrd %0; \
isync; \
\
@@ -62,13 +62,13 @@
clrldi %0,%0,1; \
mtmsrd %0; \
isync;" \
- : "=r"(scratch), "=r"(valhi) : "r"(vallo), "K"(reg), "r"(32))
+ : "=r"(scratch), "=r"(valhi) : "r"(vallo), "K"(reg), "r"(32), "r"(1))
#define mfspr64upper(reg,scratch) \
( { register_t val; \
__asm __volatile(" \
mfmsr %0; \
- insrdi %0,1,1,0; \
+ insrdi %0,%4,1,0; \
mtmsrd %0; \
isync; \
\
@@ -78,7 +78,7 @@
clrldi %0,%0,1; \
mtmsrd %0; \
isync;" \
- : "=r"(scratch), "=r"(val) : "K"(reg), "r"(32)); \
+ : "=r"(scratch), "=r"(val) : "K"(reg), "r"(32), "r"(1)); \
val; } )
#endif /* _LOCORE */
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