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* Refine revision handlingStefan Tauner2015-01-102-2/+17
| | | | | | | | | | | | | Up to now, when compiling flashrom outside a VCS it would print two warnings that are not very clear to the user. This patch adds a new auxilary function to getrevision.sh and uses it in the makefile to print a single and more meaningful message to the user while hiding the warnings from getrevision.sh. Corresponding to flashrom svn r1862. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fix wrong density encoding on Intel SilvermontTai-Hong Wu2015-01-052-30/+26
| | | | | | | | | | | | | | Silvermont (Bay Trail, Rangeley, Avoton) seems to still use the old density encoding with 3 bits per chip. Documentation is unavailable (held concealed by Intel) but thanks to the efforts of Tai-Hong (Type) Wu the layout is clear now. This patch is based on his one but solves the issue differently thus reducing the code complexity. Corresponding to flashrom svn r1861. Signed-off-by: Tai-Hong Wu <thwu@lunartoday.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for the MSTAR I2C ISP protocolAlexandre Boeglin2014-12-205-0/+339
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basically, among other chips, MSTAR manufactures SoCs that equip TV sets and computer screens, and it seems that all of their products use the same in-system programming protocol. Basically, they use the DDC channel of VGA or DVI connectors, which is actually an I2C bus, to encapsulate SPI frames (the flash chip is connected to the SoC through an SPI bus). I wrote this patch since the screen I bought had a software bug, and the manufacturer only released a new firmware binary, but no tool or instructions on flashing it. More details can be found here: http://boeglin.org/blog/index.php?entry=Flashing-a-BenQ-Z-series-for-free(dom) I only read code from Linux kernel archives published by Acer to figure out the protocol (for a touchscreen controller and an NFC chip, both by MSTAR, that share the same ISP protocol), so I don't think there are any legal problems with it. Compilation is currently disabled by default in the Makefile. If in doubt, additional Makefile bugs were added by Stefan. Corresponding to flashrom svn r1860. Signed-off-by: Alexandre Boeglin <alex@boeglin.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fix handling of write protection at register space address +2Stefan Tauner2014-12-202-41/+53
| | | | | | | | | | | | | | | Since r1833 we added the offset of the virtual register in several functions, which produced segfaults. This patch renames a few parameters and reorganizes/fixes various parts of the changelock_regspace2_block() function - hence the rather big diff. Thanks to Roman Lebedev for reporting this issue and testing numerous revisions of this patch. Corresponding to flashrom svn r1859. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Spansion S25FL127SStefan Tauner2014-12-123-3/+80
| | | | | | | | | | | | | | | | | | | | This flash chip can be configured (one time) to use 64 KiB or 256 KiB sectors. Additionally, in the 64 KiB mode it supports 16 4 KiB sub-sectors that can be (one time) programmed to be on the top or bottom of the device. The sub-sectors can be erased with the 0x20 opcode but because this opcode does not work with the remaining sectors and flashrom can not cope with that the 0x20 opcode is not supported yet. This patch adds two definitions, one for the 64 KiB and 256 KiB configuration respectively. The device also shares the RDID with the various S25FL128 devices so we have to increase the maximum number of successfully probed chips to 8. The 64 KiB mode was tested on real hardware. Binary file (standard input) matches Corresponding to flashrom svn r1858.
* Add support for Eon EN29LV040 and EN29LV040ADenis 'GNUtoo' Carikli2014-12-072-1/+28
| | | | | | | | | | | Both use the same ID and are mostly identical. Tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Corresponding to flashrom svn r1857. Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Intel 82599 10 GbE NICsEd Swierk2014-12-051-2/+23
| | | | | | | | | | | | | | | | | | | The Intel 82599 series of 10 GbE controllers has a bit-banged SPI interface that's register-compatible with the one in the 1 GbE controllers, except the register addresses are shifted up by 0x10000, cf. Intel document 331520: http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf This patch was tested with a board that has the 0x10fc device and a Micron M25P40 SPI flash chip. The PCI IDs and names for the devices are per Intel document 331521 https://www-ssl.intel.com/content/dam/www/public/us/en/documents/specification-updates/82599-10-gbe-controller-spec-update.pdf and the PCI SIG device ID registry with small refinements. Corresponding to flashrom svn r1856. Signed-off-by: Ed Swierk <eswierk@skyportsystems.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add board enable for GIGABYTE GA-8SIMLFS 2.0Stefan Tauner2014-11-302-0/+3
| | | | | | | | | | | This board was used/sold by Fujitsu. The board enabled was tested (sadly with the wrong image, i.e. one of the GA-8SIMLH images directly from GIGABYTE instead of one from Fujitsu). Corresponding to flashrom svn r1855. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* cbtable.c: Do not unnecessarily duplicate stringsPaul Menzel2014-11-011-8/+4
| | | | | | | | | | | | The strdup calls were a leftover that slipped through the cleanup in r1577. Found-by: Valgrind 3.10.0 Corresponding to flashrom svn r1854. Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Move strtok_r implementation verbatim to helpers.cStefan Tauner2014-11-013-21/+24
| | | | | | | Corresponding to flashrom svn r1853. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* dmi.c: make sure we call isprint() correctlyStefan Tauner2014-10-191-1/+1
| | | | | | | | | | | ISO C and POSIX require to call ctype functions with values representable by unsigned char. We have used a char as input so far which might be negative and hence get sign-extended. Corresponding to flashrom svn r1852. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Make read before write configurable (infrastructure part)Stefan Tauner2014-10-193-17/+50
| | | | | | | | | | | | | | - Introduce a variable in doit() that allows to influence read-before-write and its consequences. - Modify build_new_image so that it still works even if the old content is not read before. - Add copy_old_content() to ease the pain for future patches. Corresponding to flashrom svn r1851. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Winbond W25Q40.V chipsStefan Tauner2014-09-091-0/+40
| | | | | | | | | Read-tested by Peter Ruesch. Corresponding to flashrom svn r1850. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* dmi.c: Duplicate returned strings because they are meant to be freedStefan Tauner2014-09-051-3/+3
| | | | | | | | | Without this patch dmi_shutdown calls free() on read-only strings. Corresponding to flashrom svn r1849. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Introduce generic shutdown_free() and remove redundant internal_shutdown()Stefan Tauner2014-08-313-7/+7
| | | | | | | | | The former will be useful in cases where cleanup equals a simple call to free(). Corresponding to flashrom svn r1848. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine physical address mapping of flash chipsStefan Tauner2014-08-305-40/+97
| | | | | | | | | | | | | | | | | | - Create distinct functions for mapping and unmapping for flash chips. - Map only when needed: map before probing and unmap immediately after it. Map again when a single chip was probed successfully before taking any actual actions and clean up afterwards. - Map special function chip registers centrally together with flash space instead of within (some) probing methods after successful probes. - Save the used base addresses of the mappings in struct flashctx as well. - Do not try to (un)map the zero-sized chip definitions that are merely hacks. This also fixes the printing of wrong warnings for these chip definitions introduced in r1765. Corresponding to flashrom svn r1847. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Macronix MX23L1654, MX23L6454 and MX23L12854 mask ROMsMichael Coppola2014-08-202-0/+51
| | | | | | | Corresponding to flashrom svn r1846. Signed-off-by: Michael Coppola <michael.n.coppola@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Intel Wildcat Point PCHDuncan Laurie2014-08-205-4/+27
| | | | | | | | | | | The Wildcat Point PCH can be paired with Broadwell or Haswell. This patch was essentially backported from ChromiumOS commit 9bd2af8. Corresponding to flashrom svn r1845. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Intel Silvermont: Bay Trail, Rangeley and AvotonDuncan Laurie2014-08-205-59/+191
| | | | | | | | | | | | | | | | | | | | | | | The core of this patch to support Bay Trail originally came from the Chromiumos flashrom repo and was modified by Sage to support the Rangeley/Avoton parts as well. Because that was not complicated enough already Stefan Tauner refactored and refined everything. Bay Trail seems to be the first Atom SoC able to support hwseq. No SPI Programming Guide could be obtained so it is handled similarly to Lynx Point which seems to be its nearest relative. Tested-by: Marc Jones <marcj303@gmail.com> Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Tested-by: Thomas Reardon <thomas_reardon@hotmail.com> Tested-by: Wen Wang <wen.wang@adiengineering.com> Corresponding to flashrom svn r1844. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Marc Jones <marcj303@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine Flash Component descriptor handlingStefan Tauner2014-08-204-65/+204
| | | | | | | | | | | | | | | Possible values as well as encodings have changed in newer chipsets as follows. - Pre-PCH (i.e. ICH) chipsets had a maximum frequency of 33 MHz for all operations - Since Cougar Point the chipsets support dual output fast reads (encoded in bit 30). - Flash component density encoding has changed from 3 to 4 bits with Lynx Point, currently allowing for up to 64 MB chips. Corresponding to flashrom svn r1843. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine handling chips that exceed maximum programmer sizesStefan Tauner2014-08-153-21/+21
| | | | | | | | | | | | | | | | - Change check_max_decode() to return the number of (common) busses where the flash chip exceeds the supported size of the programmer. - Refine its signature to use a flashctx pointer only. - Move CLI-related bits to cli_classic.c. - Rename check_max_decode() to count_max_decode_exceedings() to better reflect what it (now) really does. - Refine the messages printed by the caller to better integrate with the new setup, and simplify them. Corresponding to flashrom svn r1842. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refactor some CLI-relevant partsStefan Tauner2014-08-088-109/+128
| | | | | | | | | | | | | | | Begin to move functions that clearly belong to the (command line) user interface out of flashrom's core files like flashrom.c. - Refine messages within check_chip_supported(), rename it to print_chip_support_status() and move it to newly created cli_common.c. - Move flashbuses_to_text() to cli_common.c as well. - Move global verbosity variables to cli_output.c. Corresponding to flashrom svn r1841. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Unify non-shifted and shifted JEDEC accessCarl-Daniel Hailfinger2014-08-087-213/+81
| | | | | | | | | | | | | | | | | | Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit) for 8-bit mode. Some programmers can access them in 16-bit mode, but on all flashrom-supported programmers so far, we access them in 8-bit mode. This means we have to shift the addresses but apart from the addresses we can share the code. This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED flag in common JEDEC functions and applying the right addresses respectively. Corresponding to flashrom svn r1840. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 21Stefan Tauner2014-08-0615-84/+111
| | | | | | | | | | | | | Tested mainboards: OK: - ASUS F2A85-M Reported by various corebooters - ASUS M2N-MX SE Plus Reported by Antonio - ASUS P5LD2 Binary file (standard input) matches Corresponding to flashrom svn r1839.
* Add support for S25FL128P, S25FL129P and refine it for S25FL128S chipsStefan Tauner2014-08-063-4/+185
| | | | | | | | | | | | | | | | | | | | | | | | Additionally to the existing S25FL128S......0 definition this patch adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as S25FL129P......0 and S25FL129P......1 definitions. S25FL12xP seem to be the predecessor families of S25FL128S. All associated chips can not be distinguished with RDID alone. Besides the new chips, this patch also fixes the name of the previously supported S25FL128S model with uniform 256 kB sectors (S25FL128P......1 not 0) and adds the hybrid sector version (0) as well. Due to the shared IDs the user has to select the right chip manually with the -c parameter. To make this even possible, this patch enlarges the respective array for results to 6. Tested-by: Antonio Ospite <ao2@ao2.it> with a S25FL129P......0. Corresponding to flashrom svn r1838. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* ichspi: fix missing set_addr on erases and possible crossings of 256 B ↵Stefan Tauner2014-08-051-0/+8
| | | | | | | | | | | | | | boundaries Apparently the erase function did never set any address before issuing the erase commands. How could this ever work? Also, according to PCH documentation crossing 256 byte boundaries is invalid and may cause wraparound due to the flash chip's pages. Check for this on reads as well as writes. Binary file (standard input) matches Corresponding to flashrom svn r1837.
* linux_spi: properly convert pointers to kernel's u64David Riley2014-08-051-2/+2
| | | | | | | | | | | | | | | | | | | For arm64 with 32-bit userspace, pointers such as 0xff96ebf8 were incorrectly getting converted to u64_t 0xffffffffff96ebf8 in the spi_ioc_transfer struct which was causing ioctl()s to be rejected by the kernel. With this patch we first cast to uintptr_t (to avoid warnings on architectures where char * are not 64b wide) and then to uint64_t which is always big enough and does not produce warnings. This patch is taken from ChromiumOS' Change-Id: I5a15b4ca5d9657c3cb1ddccd42eafd91c852dd26 Reviewed-by: David Hendricks <dhendrix@chromium.org> Corresponding to flashrom svn r1836. Signed-off-by: David Riley <davidriley@chromium.org> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for a bunch of 29GL parallel flash chipsStefan Tauner2014-08-034-10/+754
| | | | | | | | | | | | | | | | | | | | | | 29GL chips use a new 3-Byte device ID probing function at addresses 0x01, 0x0E, 0x0F. Flash chip families supported by this method include... - EON EN29GL - Gigadevice GD29GL (if they really exist) - ISSI (PMC) IS29GL - Macronix MX29GL (+MX68GL1G0F) - Spansion S29GL (+S70GL02G) - Winbond W29GL This patch adds respective flash chip definitions for chips up to 16 MB from Eon, ISSI, Macronix and Winbond. Bigger chips as well as those from Gigadevice and Spansion are left out. Corresponding to flashrom svn r1835. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Atmel AT49LH004 and AT49LH00B4Stefan Tauner2014-08-032-6/+80
| | | | | | | | | Also, slightly refine the definition of AT49LH002. Corresponding to flashrom svn r1834. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refactor unlocking of many chips with locking at register space address +2Carl-Daniel Hailfinger2014-08-039-315/+248
| | | | | | | | | | | This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families. The erase and write test status bits of all affected chips have been reset. Corresponding to flashrom svn r1833. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add new programmer for SPI EEPROMs attached to Intel 82580 NICsRicardo Ribalda Delgado2014-07-285-3/+379
| | | | | | | | | | | | | | | | | This patch lets you read and write the EEPROM on 82580-based gigabit NIC cards. So far it has been tested on copper NICs only, but other variants employing this controller should work too. It is a nice substitution for the official eeupdate tool. Speed is quite decent: less than 4 seconds for erases or writes of 32 kB. Tested-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Corresponding to flashrom svn r1832. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Rename programmer registration functionsCarl-Daniel Hailfinger2014-07-1939-197/+194
| | | | | | | | | | | | Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for AMD Bolton chipsetMartin Roth2014-07-151-20/+26
| | | | | | | | | | | | | | SPI controller on the bolton chipset uses the same 3-bit speed settings as Yangtze, but is otherwise the same as the Hudson chips. Note that the Bolton RRG doesn't specify a speed setting for the bit setting of 0b111, so I'm assuming that it's the same setting as Yangtze. Corresponding to flashrom svn r1830. Signed-off-by: Martin Roth <martin.roth@se-eng.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Refine messages regarding AMD FCH flash protectionsStefan Tauner2014-07-151-5/+8
| | | | | | | Corresponding to flashrom svn r1829. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add Board Enable for ASUS Vintage 2 PH1 (P5LD2-MQ)Dima Veselov2014-07-142-0/+3
| | | | | | | | | | | | ASUS Vintage 2 PH1 barebone systems have a mainboard from the P5LD2 series, namely the P5LD2-MQ (although it is labeled V2-PH1). Pin 16 GPIO needs to be raised to enable write/erase like on other boards of the series. NB: it uses a ICH7DH southbridge and hence requires different PCI IDs. Corresponding to flashrom svn r1828. Signed-off-by: Dima Veselov <kab00m@lich.phys.spbu.ru> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Improve messages on failed erases with default verbosityStefan Tauner2014-07-131-2/+2
| | | | | | | | | | | | | | | | | | | | | Without this... Erasing and writing flash chip... ERASE FAILED at 0x00001000! Expected=0xff, Read=0xb4, failed byte count from 0x00000000-0x0000ffff: 0xef09 ERASE FAILED! Reading current flash chip contents... done. <loooooong break while the next eraser and writing is tried> Erase/write done. Verifying flash... VERIFIED. Even if there is not a long temporal pause, it is very confusing for the user to first see a failed erase, followed by a read, a done message and eventually the verification message. This patch inserts "Looking for another erase function." where there is just a silent pause above. Corresponding to flashrom svn r1827. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fix Intel FWH IDSEL message printingStefan Tauner2014-07-131-7/+7
| | | | | | | | | | This should get rid of extra and/or missing line breaks in verbose(+) output on Intel chipsets. Corresponding to flashrom svn r1826. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for Macronix MX29F022(N)B and MX29F022(N)TDaniele Forsi2014-07-132-0/+65
| | | | | | | | | | The MX29F022(N)T definition was successfully tested by Daniele. Corresponding to flashrom svn r1825. Signed-off-by: Daniele Forsi <dforsi@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Fix garbage handling in DMI stringsStefan Tauner2014-07-131-17/+35
| | | | | | | | | | | | | | | | | | | | Previously we tried to replace garbage characters with <space> directly in the read-only memory-mapped SMBIOS area(!). This could never have worked for any DMI strings with garbage and results in a segfault on machines with such strings. Thanks to Brian Rak (Supermicro X10SLE-F) and John Pohlman (HP XW9400) for reporting this issue. With this patch the strings are duplicated within dmi_string() already, just before we sanitize them. Also, the limit variable used everywhere points to the first invalid byte address. Refine respective checks accordingly. Corresponding to flashrom svn r1824. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Macronix MX25U12835FMartin Roth2014-07-131-0/+40
| | | | | | | | Corresponding to flashrom svn r1823. Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* EEPROM support: handle implicit eraseCarl-Daniel Hailfinger2014-06-162-0/+6
| | | | | | | | | | | Add support for EEPROMs with 1 byte granularity and implicit erase on write. flashrom will not try to erase before write on these chips. Explicitly requested erase with -E is done by writing 0xff. Corresponding to flashrom svn r1822. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add selfcheck_board_enables()Stefan Tauner2014-06-123-0/+35
| | | | | | | | | | | | Check for NULL termination of the array, that each board has the two main PCI ID sets defined, that coreboot vendor and model fields are either both set or unset, and that at least either an enable function or a max decode size is available. Corresponding to flashrom svn r1821. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove MCP6/7/8 SPI log requestsStefan Tauner2014-06-121-14/+5
| | | | | | | | | | We got enough (and no one is looking at them for the time being anyway). Also, return an error code in the case no bus type could be detected. Corresponding to flashrom svn r1820. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Introduce helpers.cStefan Tauner2014-06-125-52/+81
| | | | | | | | | | Move some suitable functions there, add it to the Makefile, but leave the declarations in flash.h for now. Corresponding to flashrom svn r1819. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Sanyo LE25FW106Stefan Tauner2014-06-044-0/+40
| | | | | | | | | | | Also, add spi_disable_blockprotect_bp1_srwd(). Originally written and tested by The Raven <originalraven@hotmail.com>. Corresponding to flashrom svn r1818. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* print_wiki.c: there is only one way to represent timeStefan Tauner2014-06-021-2/+4
| | | | | | | | | ISO 8601. Corresponding to flashrom svn r1817. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* print_wiki.c: refine header and include a legend explaining the test state ↵Stefan Tauner2014-06-021-4/+26
| | | | | | | | | representation Corresponding to flashrom svn r1816. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Utilize new tested states for chipsets as wellStefan Tauner2014-06-022-268/+268
| | | | | | | | | | | Mark all ME-enabled Intel chipsets as DEP, alter print.c accordingly (print_wiki.c was already prepared). And realign the chipset enable table when we are at it already. Corresponding to flashrom svn r1815. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add default arguments for the default programmer (only)Stefan Tauner2014-06-022-2/+10
| | | | | | | | | This code exists thanks to food for thought from Urja Rannikko. Corresponding to flashrom svn r1814. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move global io_base_addr into compilation unitsStefan Tauner2014-06-0110-7/+10
| | | | | | | Corresponding to flashrom svn r1813. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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