Add support for Intel Wildcat Point PCH

The Wildcat Point PCH can be paired with Broadwell or Haswell.
This patch was essentially backported from ChromiumOS commit 9bd2af8.

Corresponding to flashrom svn r1845.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

5 files changed, 27 insertions, 4 deletions

diff --git a/chipset_enable.c b/chipset_enable.c
index b74d6d2..dd4e0ea 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -594,7 +594,7 @@ static void enable_flash_ich_handle_gcs(struct pci_dev *dev, enum ich_chipset ic
 	static const char *const straps_names_tunnel_creek[] = { "SPI", "LPC" };
 	static const char *const straps_names_ich8910[] = { "SPI", "SPI", "PCI", "LPC" };
 	static const char *const straps_names_pch567[] = { "LPC", "reserved", "PCI", "SPI" };
-	static const char *const straps_names_pch8_baytrail[] = { "LPC", "reserved", "reserved", "SPI" };
+	static const char *const straps_names_pch89_baytrail[] = { "LPC", "reserved", "reserved", "SPI" };
 	static const char *const straps_names_pch8_lp[] = { "SPI", "LPC" };
 	static const char *const straps_names_unknown[] = { "unknown", "unknown", "unknown", "unknown" };
 
@@ -623,8 +623,9 @@ static void enable_flash_ich_handle_gcs(struct pci_dev *dev, enum ich_chipset ic
 		straps_names = straps_names_pch567;
 		break;
 	case CHIPSET_8_SERIES_LYNX_POINT:
+	case CHIPSET_9_SERIES_WILDCAT_POINT:
 	case CHIPSET_BAYTRAIL:
-		straps_names = straps_names_pch8_baytrail;
+		straps_names = straps_names_pch89_baytrail;
 		break;
 	case CHIPSET_8_SERIES_LYNX_POINT_LP:
 		straps_names = straps_names_pch8_lp;
@@ -776,6 +777,12 @@ static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name)
 	return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc);
 }
 
+/* Wildcat Point */
+static int enable_flash_pch9(struct pci_dev *dev, const char *name)
+{
+	return enable_flash_ich_spi(dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc);
+}
+
 /* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley.
  * These have a distinctly different behavior compared to other Intel chipsets and hence are handled separately.
  *
@@ -1759,6 +1766,14 @@ const struct penable chipset_enables[] = {
  	{0x8086, 0x8d5d, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
  	{0x8086, 0x8d5e, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
  	{0x8086, 0x8d5f, NT,  "Intel", "Wellsburg",			enable_flash_pch8_wb},
+	{0x8086, 0x9cc1, NT,  "Intel", "Haswell U Sample",		enable_flash_pch9},
+	{0x8086, 0x9cc2, NT,  "Intel", "Broadwell U Sample",		enable_flash_pch9},
+	{0x8086, 0x9cc3, NT,  "Intel", "Broadwell U Premium",		enable_flash_pch9},
+	{0x8086, 0x9cc5, NT,  "Intel", "Broadwell U Base",		enable_flash_pch9},
+	{0x8086, 0x9cc6, NT,  "Intel", "Broadwell Y Sample",		enable_flash_pch9},
+	{0x8086, 0x9cc7, NT,  "Intel", "Broadwell Y Premium",		enable_flash_pch9},
+	{0x8086, 0x9cc9, NT,  "Intel", "Broadwell Y Base",		enable_flash_pch9},
+	{0x8086, 0x9ccb, NT,  "Intel", "Broadwell H",			enable_flash_pch9},
 #endif
 	{0},
 };
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 90f3150..1966f66 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -141,7 +141,8 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
 	case CHIPSET_8_SERIES_LYNX_POINT:
 	case CHIPSET_BAYTRAIL:
 	case CHIPSET_8_SERIES_LYNX_POINT_LP:
-	case CHIPSET_8_SERIES_WELLSBURG: {
+	case CHIPSET_8_SERIES_WELLSBURG:
+	case CHIPSET_9_SERIES_WILDCAT_POINT: {
 		uint8_t size_enc;
 		if (idx == 0) {
 			size_enc = desc->component.new.comp1_density;
@@ -184,6 +185,7 @@ static const char *pprint_freq(enum ich_chipset cs, uint8_t value)
 	case CHIPSET_BAYTRAIL:
 	case CHIPSET_8_SERIES_LYNX_POINT_LP:
 	case CHIPSET_8_SERIES_WELLSBURG:
+	case CHIPSET_9_SERIES_WILDCAT_POINT:
 		return freq_str[value];
 	case CHIPSET_ICH_UNKNOWN:
 	default:
@@ -825,6 +827,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
 	case CHIPSET_BAYTRAIL:
 	case CHIPSET_8_SERIES_LYNX_POINT_LP:
 	case CHIPSET_8_SERIES_WELLSBURG:
+	case CHIPSET_9_SERIES_WILDCAT_POINT:
 		if (idx == 0) {
 			size_enc = desc->component.new.comp1_density;
 		} else {
diff --git a/ich_descriptors.h b/ich_descriptors.h
index 208e640..c41f9d9 100644
--- a/ich_descriptors.h
+++ b/ich_descriptors.h
@@ -117,7 +117,7 @@ struct ich_desc_component {
 		 * Wildcat Point/9:	50		?? (multi I/O)	?	?:?, ?:?
 		 */
 		struct {
-			uint32_t 		:17,
+			uint32_t		:17,
 				 freq_read	:3,
 				 fastread	:1,
 				 freq_fastread	:3,
diff --git a/programmer.h b/programmer.h
index 5ac54e7..09b6087 100644
--- a/programmer.h
+++ b/programmer.h
@@ -603,6 +603,7 @@ enum ich_chipset {
 	CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */
 	CHIPSET_8_SERIES_LYNX_POINT_LP,
 	CHIPSET_8_SERIES_WELLSBURG,
+	CHIPSET_9_SERIES_WILDCAT_POINT,
 };
 
 /* ichspi.c */
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 78cb15b..b6c1b12 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -123,6 +123,7 @@ static void usage(char *argv[], char *error)
 "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n"
 "\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n"
 "\t- \"8\" or \"lynx\" for Intel's 8 series chipsets.\n"
+"\t- \"9\" or \"wildcat\" for Intel's 9 series chipsets.\n"
 "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
 "the GbE blob that is required to initialize the GbE are also dumped to files.\n",
 	argv[0], argv[0]);
@@ -205,6 +206,9 @@ int main(int argc, char *argv[])
 			cs = CHIPSET_8_SERIES_LYNX_POINT;
 		else if ((strcmp(csn, "silvermont") == 0))
 			cs = CHIPSET_BAYTRAIL;
+		else if ((strcmp(csn, "9") == 0) ||
+			 (strcmp(csn, "wildcat") == 0))
+			cs = CHIPSET_9_SERIES_WILDCAT_POINT;
 	}
 
 	ret = read_ich_descriptors_from_dump(buf, len, &desc);