| Commit message (Collapse) | Author | Age | Files | Lines |
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I needed to reflash a N25Q256 on a host system and hacked flashrom
to make this work. For this, I used the 4-Bytes address support
developed by Boris Baykov. This is why the patch is an RFC. The
whole patchset is available under github here:
https://github.com/legoater/flashrom
I can help in getting this patchset merged but do the comments
in :
http://patchwork.coreboot.org/patch/4272/
need to be all addressed or can we rework a bit the patchset to
merge the main changes separately :
- 4-bytes addressing
- W25Q256.V support
- SFDP
- Progress visualization
- ...
Tested under Linux with spidev.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Reason to patch: %06x isn't enough to show 32-bit address.
Patched files
-------------
flashrom.c
+ changed in address print %06x to %08x for support of 32MB+ chips
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013207.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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After I added SFDP 1.6 parser I found in Micron's datasheet
for MT25Q 512Mb chip (MT25QL512AB/MT25QU512AB) that the chip
returnes SFDP revision 1.5 but simultaniously provides the
required information about addressing mode switch, however
all information about direct-4BA functions isn't provided.
I decided to parse new SFDP 4-bytes info from SFDP
revision 1.5 besides of direct-4BA instructions. This
assumption is made for better support of Micron flash chips.
This code should be checked and may be modified or removed.
Patched files
-------------
sfdp.c
+ added fix for Micron chips to read 16th dword stating from SFDP revision 1.5
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013234.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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To test the parser code for SFDP revision 1.6 (from JESD216B)
I've added some simulation code to sfdp.c. This code builds
fake SFDP 1.6 tables in memory and passes them to the SFDP
parser. Surely this simulation code is switched off by default
and can be activated via define on the top of sfdp.c
Patched files
-------------
sfdp.c
+ added simulation of JESD216B for any flash chips (just for testing)
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013202.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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More than a year ago JEDEC released new standard
JESD216 (revision B) which describes in detail how to receive
4-bytes addressing settings from the chip. This patch provides
new code to add compliance to JESD216B to Flashrom. This means
that Flashrom now can automatically detect 4-bytes addressing
features of large flash chips and use them to access data.
However not all things are so good. Unfortunately JESD216B
had come to manufacturer's production lines just 2-3 months
ago. So, we have many chips that have large size requires
32-bit addressing but their SFDP tables have revision lower
than 1.6 (described in JESD216B standard). For example my
W25Q256FV returns SFDP info with revision 1.0, first one :-)
This situation leads us to requirement to try to work now
without new SFDP info. And it's implemented in the patch too.
Also I have to make an excuse about testing of SFDP rev 1.6
parser. I've tested it as good as I can using the simulation
code which is in the next patch but I don't have ability to
test it on real flash chips because I don't have a chip
complied to JESD216B with SFDP 1.6 now.
This code should be tested later.
Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c
flash.h
+ feature definitions added
+ added type field to block_eraser structure
sfdp.c
+ added compliance to JEDEC JESD216B standard (SFDP revision 1.6)
+ added parse of SFDP 4-Bytes Addressing features (probe_spi_sfdp,sfdp_fill_flash)
+ added parse of SFDP 4-Bytes Addressing Instruction Table (sfdp_parse_4ba_table)
+ added choosing of block_erasers for 4-bytes addressing (sfdp_*_uniform_eraser*)
+ added exact flash page_size recognision from 11th dword in SFDP rev 1.6
spi4ba.h
+ definitions for 16th dword bits of SFDP Basic Flash Param Table (JESD216B)
+ definitions for SFDP 4-Bytes Addressing Instruction Table (JESD216B)
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)
spi4ba.c
+ functions to choose block_eraser by opcode for 4-bytes addressing for sfdp.c
+ functions to select proper block_eraser (ext.reg or 4-bytes addr) for sfdp.c
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013196.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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I've added progress visualization for read, erase and write operations.
It's turned out that seeing progress is essential for reading and
especially writing 32 MB of data via SPI. The operation can take more
then 10 minutes on 15 MHz frequency of SPI. So, it's good to see its
progress. I've added percents and slightly modified cli_output.c to
send percents to screen only but not to logfile.
Patched files
-------------
cli_output.c
+ print() patched to skip strings which are starting from '\b'
to prevent writing progress percents to logfile
flash.h
+ added some definitions for progress visialization
flashrom.c
+ added progress visualization for erase/write (essensial for 32MB+ chips)
spi25.c
+ added progress visualization for read operation (essensial for 32MB+ chips)
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013203.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Large flash chips usually support special instructions to work with
4-bytes address directly from 3-bytes addressing mode and without
do switching to 4-bytes mode. There are 13h (4BA Read), 12h (4BA Program)
and 21h,5Ch,DCh (4BA Erase), correspondingly. However not all these
instructions are supported by all large flash chips. Some chips
support 13h only, some 13h,12h,21h and DCh, but not 5Ch. This depends
on the manufacturer of the chip.
This patch provides code to use direct 4-bytes addressing instructions.
This code should work but it tested partially only. My W25Q256FV has
support for 4BA_Read (13h), but doesn't have support 4BA_Program (12h)
and 4BA_Erase instructions. So, direct 4BA program and erase
should be tested after.
Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c
flash.h
+ feature definitions added
flashchips.c
+ modified definition of Winbond W25Q256BV/W25Q256FV chips
flashrom.c
+ modified switch to 4-bytes addressing for direct-4BA instructions
spi4ba.h
+ definitions for 4-bytes addressing JEDEC commands
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)
spi4ba.c
+ functions for read/write/erase directly with 4-bytes address (from any mode)
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013198.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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On some flash chips data with addresses more than 24-bit field
can address may be accessed by using Extended Address Register.
The register has 1-byte size and stores high byte of 32-bit address.
Then flash can be read from 3-bytes addressing mode with writing
high byte of address to this Register. By using this way we have
access to full memory of a chip. Some chips may support this method
only.
This patch provides code use Extended Address Register.
Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c
flash.h
+ feature definitions added
flashrom.c
+ modified switch to 4-bytes addressing to support extended address register
spi4ba.h
+ definitions for 4-bytes addressing JEDEC commands
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)
spi4ba.c
+ functions for write Extended Address Register
+ functions for read/write/erase with Extended Address Register
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013200.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Here is the definition of new W25Q256xV chip with new functions pointers
for 4-bytes addressing reads and writes. Erase functions pointers are
changed in their old places. New feature flags for 4-bytes mode added.
Patched files
-------------
flashchips.c
+ added definition for Winbond W25Q256BV/W25Q256FV chips
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013201.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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This patch integrates code of the previous patch into Flashrom's code.
All the integrations is around 3 functions spi_nbyte_read, spi_nbyte_program
and spi_byte_program. After this patch then are not static and can be called
by their pointers saved in flashchips array. Also I added to flashrom.c some
code to switch a chip to 4-bytes addressing mode. And one error message is
corrected in spi.c because it's not suitable for 32-bit addresses.
Patched files
-------------
flash.h
+ added set of 4-bytes address functions to flashchip structure definition
flashrom.c
+ added switch to 4-bytes addressing more for chips which support it
serprog.c
+ added 4-bytes addressing spi_nbyte_read call to serprog_spi_read
spi.c
+ fixed flash chip size check in spi_chip_read
spi25.c
+ added 4-bytes addressing spi_nbyte_read call to spi_read_chunked
+ added 4-bytes addressing spi_nbyte_program call to spi_write_chunked
+ added 4-bytes addressing spi_byte_program call to spi_chip_write_1
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013205.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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If flash chip is switched to 4-bytes addressing mode then all
read/erase/program instructions will be switched from 3-bytes mode
to 4-bytes mode. Then well known instructions like 03h (Read),
02h (Program) and 20h,52h,D8h (Erase) will become one byte longer
and accept 4-bytes address instead of 3-bytes.
This patch provides support for well known instructions in 4-bytes
addressing mode. Also here is the code to enter 4-bytes addressing
mode by execute the instruction B7h (Enter 4-bytes mode).
Patched files
-------------
chipdrivers.h
+ added functions declarations for spi4ba.c
flash.h
+ feature definitions added
Makefile
+ added spi4ba.c
Added files
-----------
spi4ba.h
+ definitions for 4-bytes addressing JEDEC commands
+ functions declarations from spi4ba.c (same as in chipdrivers.h, just to see)
spi4ba.c
+ functions for enter 4-bytes addressing mode
+ functions for read/write/erase in 4-bytes addressing mode
Signed-off-by: Boris Baykov <dev@borisbaykov.com>, Russia, Jan 2014
[clg: ported from
https://www.flashrom.org/pipermail/flashrom/2015-January/013199.html ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Corresponding to flashrom svn r1954.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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An internal security audit of the flashrom project by
Carl-Daniel Hailfinger found a buffer overflow bug present in all
flashrom versions since the year 2005.
This bug was independently found and reported to flashrom.org by
Cosmin Gorgovan a few days ago.
A buffer on the stack and a buffer on the heap are affected by the
overflow caused by an incorrect fscanf format string.
The buffer overflow can only be triggered if the optional layout feature
is used and if the user manually specifies a specially crafted layout
file on the command line. Command line parsing and flash image handling
do not trigger the buggy code path.
Most usage of flashrom does not involve layout files.
The fix in this commit (changed fscanf format string) can be applied to
layout.c of all past flashrom versions.
Corresponding to flashrom svn r1953.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Implement serial port shutdown both for regular termination and error conditions in pony_spi.
Corresponding to flashrom svn r1952.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Tested mainboards:
OK:
- ASRock Fatal1ty 970 Performance and P4i65G
Reported by anonymous email message ID:
932677687262b1300eaf14260999d9262c31@guerrillamail.com
The latter actually had a tested board enable already.
Flash chips:
- Eon EN25Q128 to PREW (+PREW)
Reported by Adrian Graham
- GigaDevice GD25VQ41B to PREW (+PREW)
Reported by David Hendricks
- Winbond W39V040FB to PREW (+EW)
Reported by fjed on IRC
Miscellaneous:
- Change PCI IDs of "MS-6577 (Xenon)" board enable.
The previous IDs contained the on-board display adapter which is
disabled when a dedicated graphics card is installed.
- Add a note to the README how to overcome the clang warning if only a
single programmer is enabled.
- Fix some typo and manpage problems found by lintian
- r1920 introduced some explicit calls to pkg-config instead of $(PKG_CONFIG).
This patch corrects that.
- Make MS-7094 (K8T Neo2-F V2.0) board enable less contestable.
Previous PCI IDs were board-specific but ot the other of devices
that could be disabled by the firmware or that vary among
hardware revions. There are no good alternatives available.
However, since we always have a DMI decoder available now, we can
use non-board-specific devices without taking risks. Thanks to
Uwe Hermann for reporting and testing.
- Some other small changes to clean up whitespace and fix some warnings
from Debian's lintian.
Corresponding to flashrom svn r1951.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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This came up when I was testing if building on SunOS still works
on the buildbot's instance of OmniOS r151014 which is based on illumos.
The fix is
- to link against libnsl
- a small C type fix in ich_descriptor_tool
Corresponding to flashrom svn r1950.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Specifying spispeed=reserved as programmer parameter resulted in selecting the default SPI speed instead of aborting. Rewrite the logic to be more readable.
Corresponding to flashrom svn r1949.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Corresponding to flashrom svn r1948.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r1947.
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Allow mstarddc_spi and pony_spi on Android.
Allow mstarddc_spi and pony_spi on architectures with unsupported raw
access.
Corresponding to flashrom svn r1946.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Apparently, there is at least one board of Russian origin (coined
SPI_TT LPT) that works with SPI Tiny Tools which is a closed-source
Windows GUI program somewhat similar to flashrom.
Corresponding to flashrom svn r1945.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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CONFIG_NOTHING=yes
All credit for this should be given to Patrick Georgi (see r1869).
Corresponding to flashrom svn r1944.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Only hardware not needing raw access (PCI, memory, port I/O) is supported.
Corresponding to flashrom svn r1943.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Even though there is currently only one USB device ID in the wild using our
standard way to define the devices creates nicer output for -L and -z.
Corresponding to flashrom svn r1942.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Even though there is currently only one USB device ID in the wild using our
standard way to define the devices creates nicer output for -L and -z.
Corresponding to flashrom svn r1941.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Corresponding to flashrom svn r1939.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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The atapromise module uses the rom_size field of the struct pci_dev found
in pci.h that does not exist in libpayload's implementation and thus does
not compile with libpayload.
Corresponding to flashrom svn r1938.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Corresponding to flashrom svn r1937.
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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This is especially helpful for compile tests with CONFIG_EVERYTHING=yes,
but can also be used without CONFIG_EVERYTHING.
Usage:
make CONFIG_ENABLE_LIBUSB0_PROGRAMMERS=no
CONFIG_ENABLE_LIBUSB1_PROGRAMMERS=no CONFIG_ENABLE_LIBPCI_PROGRAMMERS=no
Corresponding to flashrom svn r1936.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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We do not support PCI port I/O on non-x86 (yet).
Atapromise needs PCI port I/O.
Corresponding to flashrom svn r1935.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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CONFIG_RAYER_SPI only needs raw hardware access, but not libpci.
Disable CONFIG_RAYER_SPI on Android because of missing inb/outb.
Introduce NEED_RAW_ACCESS for raw memory access, PCI port I/O
and MSR access.
Corresponding to flashrom svn r1934.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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The solution was discovered in a collaborative bug hunt with testing done by
David Hendricks. The actual culprit was found by Urja Rannikko by comparing
vanilla flashrom with David's version in chromiumos.
Tested-by: David Hendricks <dhendrix@chromium.org>
Corresponding to flashrom svn r1933.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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This won't make raw I/O work magically but at least it would provide iopl()
if some driver requires it and there is no better alternative currently.
Corresponding to flashrom svn r1932.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Command line arguments given when executing make should not stop us
from setting commonly user-configurable variables like CPPFLAGS or
LDFLAGS.
Without this patch 'make CPPFLAGS="-Ifail"' would fail to find
libusb1 headers and abort.
Add override statements where we append mandatory options to
these variables to make (Debian) packagers more happy.
Also, r1920 introduced some explicit calls to pkg-config instead of
$(PKG_CONFIG). This patch corrects that as well.
Corresponding to flashrom svn r1931.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The current code is checking model_id to remember if a chip has already
been limited, but if flashchips.c contains two subsequent chips with
different vendor_id but identical model_id the adjustment will not be
done. Switch to checking the chip size instead.
If a chip has multiple whole-chip erase functions, only one will be
modified. Fix that.
Tested-by: Joseph C. Lehner <joseph.c.lehner@gmail.com>
Corresponding to flashrom svn r1930.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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This patch is based on Nico Huber's original version that was rebased
by David Hendricks for Chromium OS in
Change-Id: I84384b9d8ed53911657cf2293733531a6e11fd23
Corresponding to flashrom svn r1929.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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As per e-mail with Dediprog, command 0x0B (which is not listed in the
command spec) is need on older Dediprogs only. SF100 with firmware
V6.0.0 and newer as well as all SF600 programmers do not support it.
The original wording by Dediprog was: "0x0B is used to adjust voltage
level, but it's available for some version of SF100 only. SF100 of
firmware V6.x.x and all version of SF600/SF600Plus not support this
command. If you have old version of SF100, 0x0B is still needed."
This patch renames dediprog_device_init() to something more
appropriate and adds comments for clarity, and only runs it
conditionally if we cannot query the devicestring initially.
Based on ChromiumOS'
Change-Id: I42de7d28401d7ad5be8fcf8a8c165e2614a45960
Corresponding to flashrom svn r1928.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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This patch is based on a number of changes by David Woodhouse and
David Hendricks.
SF600 uses two bulk endpoints, 1 for out and 2 for in unlike the
SF100 that uses only a single one. This patch make endpoint usage
more explicit and sets the in/out endpoint(s) appropriately for
SF100 and SF600.
Also, change all SF100-specific strings in messages and
leave standalone mode on SF600s.
Corresponding to flashrom svn r1927.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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If libpci, libusb0 or libusb1 are missing, make will now tell you which
currently enabled features require those libraries.
Example output:
Checking for libusb-0.1/libusb-compat headers... not found.
The following features require libusb-0.1/libusb-compat:
CONFIG_PICKIT2_SPI CONFIG_DEDIPROG.
Please install libusb-0.1 headers or libusb-compat headers.
See README for more information.
Corresponding to flashrom svn r1926.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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This patch has been cherry-picked from various patches in the chromiumos
tree denoted below.
Change-Id: I4b679e23ab37a4357b1e3d23f6f65a1c31f7d71a
Change-Id: Ibda56201ab4519315431c08206c61ceffb7c7e65
Change-Id: I540ad2d304dc69a7c79ca154beb744ef947ff808
Servo V2 has two FT4232H parts. The first one (denoted 'legacy') is
dedicated to supporting orginal Servo V1 functionality. The second,
residing at USB ID 0x18d1:5003 provides two other SPI interfaces on
port A and B respectively.
Additional changes by Alexandru Gagniuc, Hatim Kanchwala and Urja Rannikko:
- The clock divisor is set to '6', as this creates a 10MHz SPI clock,
which is the same SPI clock that the chromiumos branch produced.
- Add udev rule for Google servo boards to util/flashrom.rules.
- Add Google servo entry to manpage.
Corresponding to flashrom svn r1925.
Signed-off-by: Todd Broch <tbroch@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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We use a header for MSR accesses on AMD Geodes that does only exist
on 32 bit x86 machines.
Corresponding to flashrom svn r1924.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Corresponding to flashrom svn r1923.
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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The earlier versions of the chip require 0x2AAA for probes thus split the
definitions and set them to untested to provoke reports.
Corresponding to flashrom svn r1922.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Corresponding to flashrom svn r1921.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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Corresponding to flashrom svn r1920.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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This allows for even more easy debugging of build failures due to
problems with libraries.
Corresponding to flashrom svn r1919.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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The new protocol changes some commands, so adjust the code to support
these. Use helper functions to reduce duplication in libusb calls. Testing
with real hardware showed that the maximum read size via the control
endpoint is about 16 bytes although specification does not mention that.
Dediprog SF600 is not supported yet.
Based on the following chromiumos changes:
Change-Id: Ibd1e27d9e8273ba879b9b5d95675b99596255c89
Change-Id: Ifc33e7b1eed5b0cb80f83458fa24741a577fa46a
Additionally, some ideas from Alex for cleaner code were incorporated as well.
Tested on an SF100 V4 with both firmware generations PREWing a M25PX80
and AT45DB041D (the latter is using dediprog_spi_send_command() instead
of optimized functions which make it a good test vehicle).
Corresponding to flashrom svn r1918.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Tested mainboards:
OK:
- ASRock G31M-GS
Binary file (standard input) matches
Corresponding to flashrom svn r1917.
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Supported controllers are Promise PDC20262 (FastTrak66/Ultra66),
PDC20265 (FastTrak100 Lite/Ultra100), PDC20267 (FastTrak100/Ultra100).
At least the Ultra100 only has address lines A0-A14 wired up, limiting
addressable chip size to 32 kB. The flash chips mounted on those
controllers usually is 128 kB, i.e. parts of the flash chip are
inaccessible. As a workaround, the driver implicitly truncates the
size of all flash chips to 32 kB. Works well for the factory installed
flash.
Do NOT use as a generic programmer for chips >32 kB.
Corresponding to flashrom svn r1916.
Signed-off-by: Joseph C. Lehner <joseph.c.lehner@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
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Found by Coverity as "CID 1348465: Resource leaks".
Corresponding to flashrom svn r1915.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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