summaryrefslogtreecommitdiffstats
path: root/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c')
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c
index d4c9fe9..4c77358 100644
--- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Pcie/GppLate.c
@@ -281,6 +281,9 @@ FchInitLateGpp (
RwAlink (0x310 | (UINT32) (ABCFG << 29), 0xFFFFFFFF, BIT7, StdHeader);
RwAlink (FCH_RCINDXC_REGC0, 0xFFFFFFFF, BIT9, StdHeader);
}
- RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x0D, AccessWidth8, 0, GppS3Data);
+
+ if (ReadFchSleepType (StdHeader) != ACPI_SLPTYP_S3) {
+ RwMem (ACPI_MMIO_BASE + CMOS_RAM_BASE + 0x0D, AccessWidth8, 0, GppS3Data);
+ }
}
OpenPOWER on IntegriCloud