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* ofw_spi: Parse property for the SPI mode and CS polarity.manu2017-10-171-0/+2
| | | | | | | | | | | As cs is stored in a uint32_t, use the last bit to store the active high flag as it's unlikely that we will have that much CS. Reviewed by: loos MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D8614 (cherry picked from commit f5f9058ccaec11fccc18817f45fff8859798a317)
* MFC r310343-r310344gonzo2017-05-093-12/+22
| | | | | | | | | | | | | | | | | | | | | r310343: [iMX6] Fix build for SSI driver and add dependency for SDMA driver - Pass correct pointer to OF_getencprop - Check the size of "dmas" property - Add dependency on sdma driver Reviewed by: br Differential Revision: https://reviews.freebsd.org/D8873 r310344: [iMX6] Fix SDMA driver build - Place const modifiers where required - Make sure sdma device is attahched before consumers like SSI Reviewed by: br Differential Revision: https://reviews.freebsd.org/D8874
* MFC r312679:ian2017-03-021-0/+7
| | | | | | | Handle imx6 erratum ERR004346... to reboot, clear the SRS bit twice within the same cycle of the 32khz clock. I've never actually noticed this error happening, but it's an easy fix.
* MFC r313917:ian2017-03-011-1/+1
| | | | | Change the naming of imx{5,6} gpio pins to exactly match the names used in the reference manual.
* MFC r313674:ian2017-03-011-0/+4
| | | | Enable usb low and full speed devices connected to the imx6 root hubs.
* MFC r308186, r308188, r308231, r308232:ian2017-03-013-919/+2
| | | | | | | | | | | | | | | | | | Move imx_sdhci driver over to a dev/sdhci in preparation for QorIQ support. Freescale uses eSDHC in both i.MX (ARM) and QorIQ (PowerPC), with slight differences. This is part one in unifying the drivers. Merge i.MX and PowerPC SDHCI drivers Summary: i.MX5 and PowerPC use a very similar eSDHC controller, which is also similar to the uSDHC controller used by i.MX6. The imx_sdhci driver works almost completely with PowerPC, with some minor tweaks. Fix the build. protctl is only used on powerpc. While here, remove the need to check the SVR SPR, as others may be compatible with the p1022-esdhc type. Since it's no longer accessing a powerpc-specific register, drop the #ifdef.
* MFC r306262, r306267, r310021: (needed to avoid conflicts on later merges)ian2017-03-017-44/+2
| | | | | | | | | | Remove bus_dma_get_range and bus_dma_get_range_nb on armv6. We only need this on a few earlier arm SoCs. Restrict where we need to define fdt_fixup_table to just PowerPC and Marvell. Add the missing void to function signatures in much of the arm code.
* MFC r308640:ian2017-03-018-45/+39
| | | | | Use the correct OF_getencprop over OF_getprop + fdt32_to_cpu to read integer data from the device tree.
* MFC r309999, r310012gonzo2017-01-062-1/+2
| | | | | | | | | | | | | | | r309999: [iMX6] Fix platform compatibility string for i.MX6 Dual i.MX6 Dual boot was broken since r308533 because ofw_bus_node_is_compatible is more strict than fdt_is_compatible and does not accept partial matches r310012: [iMX6] Add compatibility string for GPT timer on i.MX6 Dual Up until r295436 GPT timer in i.MX6 Dual dts used the same compatiblity string as i.MX6 Quad. After the sync up with Linux in r295436, GPT timer stopped getting attached on the i.MX6 Dual
* MFC r306902:mmel2016-11-052-4/+0
| | | | ARM: Remove unused includes.
* MFC r306756:mmel2016-10-151-1/+2
| | | | | ARM: SEV/WFE instructions are implemented starting from ARMv6K, use it directly.
* Postpone allocation of IRQ resource to the time when interruptskra2016-06-031-3/+11
| | | | | | | | | | | | controller devices are attached. This has already been done for bus_setup_intr(). There was no doubt that if someone wants to setup an interrupt, corresponding interrupt controller device must already be attached. However, the same must be valid for allocation of an interrupt resource unless the allocation is done blindly, without any information that such interrupt even exists. While it was done this blind way before, it won't be possible after next INTRNG change.
* Add support for triggering interrupts on both rising and falling edges.ian2016-05-261-39/+67
| | | | Also, EOI a gpio interrupt in the post_ithread routine before re-enabling.
* Another round of changes to add compatibility with the older ESHDC varietyian2016-05-261-82/+160
| | | | | | | | | | | | | | | | | of hardware. Mostly this focuses on the big changes needed for setting the bus clock, because ESDHC is SDHCI v2.0 and USDHC is 3.0, and the number, location, and interpretation of clock divisor bits is vastly different between the two. This doesn't get the device all the way to functioning on ESDHC hardware yet, but it's much closer, now getting through all the card detection and negotiation of capabilties and speed (but it eventually hangs on what appears to be a missing interrupt). Another missing chunk of code for handling ESDHC's 32 bit command-and-mode register using sdhci's pair of 16 bit writes is added. This also does some leading whitespace cleanups and sorts some softc struct members by size, and adds some comments (because when do I ever touch code without adding comments?).
* INTRNG - support new interrupt mapping type INTR_MAP_DATA_GPIOskra2016-05-231-25/+65
| | | | | | introduced in r298738. Reviewed by: ian
* INTRNG - use gpio generic interrupt modes definitions added in r298738.skra2016-05-231-47/+31
| | | | Reviewed by: ian
* Fix the deciKelvin to Celsius conversion in kernel.loos2016-05-221-1/+1
| | | | | | | | | | | After r285994, sysctl(8) was fixed to use 273.15 instead of 273.20 as 0C reference and as result, the temperature read in sysctl(8) now exibits a +0.1C difference. This commit fix the kernel references to match the reference value used in sysctl(8) after r285994. Sponsored by: Rubicon Communications (Netgate)
* Fix some format strings to make them either correct or uniform.skra2016-05-221-3/+3
| | | | No functional change.
* Don't repeat the the word 'the'eadler2016-05-171-1/+1
| | | | | | | (one manual change to fix grammar) Confirmed With: db Approved by: secteam (not really, but this is a comment typo fix)
* Use OF_prop_free instead of direct call to free(9)gonzo2016-05-131-1/+1
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* INTRNG - redefine struct intr_map_data to avoid headers pollution. Eachskra2016-05-051-4/+8
| | | | | | | | | | | | | | | | struct associated with some type defined in enum intr_map_data_type must have struct intr_map_data on the top of its own definition now. When such structs are used, correct type and size must be filled in. There are three such structs defined in sys/intr.h now. Their definitions should be moved to corresponding headers by follow-up commits. While this change was propagated to all INTRNG like PICs, pic_map_intr() method implementations were corrected on some places. For this specific method, it's ensured by a caller that the 'data' argument passed to this method is never NULL. Also, the return error values were standardized there.
* sys/arm: Minor spelling fixes.pfg2016-05-043-4/+4
| | | | Only affects comments: no functional change.
* Add a MULTIDELAY option to allow the ARM kernel to have multiple DELAYandrew2016-04-303-5/+5
| | | | | | | | | | implementations. Early in the boot the kernel will use an approximate, however after the timer has been probed it will switch to a more accurate implementation. Reviewed by: manu Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5762
* sys/arm: make use of the howmany() macro when available.pfg2016-04-261-1/+1
| | | | | We have a howmany() macro in the <sys/param.h> header that is convenient to re-use as it makes things easier to read.
* Move arm's devmap to some generic place, so it can be usedbr2016-04-266-23/+23
| | | | | | | | | by other architectures. Reviewed by: imp Differential Revision: https://reviews.freebsd.org/D6091 Sponsored by: DARPA, AFRL Sponsored by: HEIF5
* Rename ARM_INTRNG and MIPS_INTRNG to INTRNG. This will help with machineandrew2016-04-154-11/+11
| | | | | | | independent code that needs to know about INTRNG such as PCI drivers. Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
* Cleanup unnecessary semicolons from the kernel.pfg2016-04-106-17/+17
| | | | Found with devel/coccinelle.
* Remove unecessary locking, mostly from places where a read is done of aian2016-04-071-13/+12
| | | | | | | | | value that can't ever be in an inconsistant intermediate state even when some other thread is in the middle of writing the value/register. Locking of the hardware remains in the few places that do r-m-w operations. Locking of metadata access is restricted to places using memcpy or sprintf to modify the metadata.
* Code cleanup: stop searching for a pin in the array and just use the pinian2016-04-071-51/+15
| | | | | number directly as an index. We create the array ourselves and nothing can change the order of items in it, it's a simple 1:1 mapping.
* Comestic changes; when INTRNG support was added, some functions becameian2016-04-071-40/+40
| | | | | | oddly separated from related functionality. This just moves some blocks of code around so that setup_intr and teardown_intr are near each other again, and likewise for enable/disable_intr. No functional changes.
* Remove FDT specific parts from INTRNG. Change its interface to make itskra2016-04-041-135/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | universal. (1) New struct intr_map_data is defined as a container for arbitrary description of an interrupt used by a device. Typically, an interrupt number and configuration relevant to an interrupt controller is encoded in such description. However, any additional information may be encoded too like a set of cpus on which an interrupt should be enabled or vendor specific data needed for setup of an interrupt in controller. The struct intr_map_data itself is meant to be opaque for INTRNG. (2) An intr_map_irq() function is created which takes an interrupt controller identification and struct intr_map_data as arguments and returns global interrupt number which identifies an interrupt. (3) A set of functions to be used by bus drivers is created as well as a corresponding set of methods for interrupt controller drivers. These sets take both struct resource and struct intr_map_data as one of the arguments. There is a goal to keep struct intr_map_data in struct resource, however, this way a final solution is not limited to that. (4) Other small changes are done to reflect new situation. This is only first step aiming to create stable interface for interrupt controller drivers. Thus, some temporary solution is taken. Interrupt descriptions for devices are stored in INTRNG and two specific mapping function are created to be temporary used by bus drivers. That's why the struct intr_map_data is not opaque for INTRNG now. This temporary solution will be replaced by final one in next step. Differential Revision: https://reviews.freebsd.org/D5730
* Fix fallout from r292180 (Dec 2015)... ensure that every driver which hasian2016-03-211-0/+1
| | | | | | | | | a DRIVER_MODULE() referencing mmc_driver has a MODULE_DEPEND() on mmc. This is because the kernel linker only searches for symbols in dependent modules, so loading sdhci_pci (and other bus-flavors of sdhci) would fail when mmc was not compiled into the kernel (even if you hand-loaded mmc first). (Thanks to jilles@ for providing the vital clue about the kernel linker.)
* Almost all copies of platform_mp_init_secondary just calledandrew2016-02-261-7/+0
| | | | | | | | | intr_pic_init_secondary. Replace them with a direct call. On BCM2836 and ARMADA XP we need to add this function, but it can be empty. Reviewed by: ian, imp Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5460
* Remove platform_mp_probe as it's almost identical on most ARM SoCs, andandrew2016-02-261-11/+0
| | | | | | | | | | slightly wrong on the others. We should just check if mp_ncpus is set to more than one CPU as we may wish to run on a single core even when SMP is available. Reviewed by: ian Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5458
* Remove platform_ipi_send, it's an unneeded as all implementations areandrew2016-02-251-7/+0
| | | | | | identical. Sponsored by: ABT Systems Ltd
* Make imx6 systems work again after recent import of new dts files.ian2016-02-231-0/+72
| | | | | | | | | | | | | Linux-driven changes to the way the chip's two interrupt controllers are defined (we only support one of them) led to no interrupt processing, so the system would hang after device instantiation. This workaround just rewrites the FDT data on the fly to get interrupt handling back under the control of the main GIC device. If/when we ever support deep sleep modes that involve powering down the main GIC, we'll have to undo this change, write a driver for the GPC-PIC, and somehow manage the handoff of responsibilities between the two drivers as the chip transitions in/out of deep sleep mode.
* Move ARM_L2_PIPT option to std.armv6 for all armv6 platforms.skra2016-02-224-5/+0
| | | | | | | Only L2 PIPT cache is supported for __ARM_ARCH >= 6. In fact, this is just a pure proclamation as this option is used only in armv4 specific files now.
* Remove pd_prot and pd_cache members from struct arm_devmap_entry.skra2016-02-171-1/+1
| | | | | The struct is used for definition of static device mappings which should always have same protection and attributes.
* Stop defining fdt_pic_table when building for ARM_INTRNG.andrew2016-02-112-0/+4
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* ARM: Use new ARMv6 naming conventions for cache and TLB functionsmmel2016-02-051-1/+2
| | | | | | in all but ARMv4 specific files. Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address in L2 cache functions if ARM_L2_PIPT is defined.
* EHCI: Make core reset and port speed reading more generic.mmel2016-01-281-2/+16
| | | | | | | | | | | | | | | | | Use driver settable callbacks for handling of: - core post reset - reading actual port speed Typically, OTG enabled EHCI cores wants setting of USBMODE register, but this register is not defined in EHCI specification and different cores can have it on different offset. Also, for cores with TT extension, actual port speed must be determinable. But again, EHCI specification not covers this so this patch provides function for two most common variant of speed bits layout. Reviewed by: hselasky Differential Revision: https://reviews.freebsd.org/D5088
* Quick exit after setting the clock control register.jhibbits2016-01-171-0/+1
| | | | Discussed with: ian
* Add i.MX 6 IPU driver and enable it in IMX6 configgonzo2015-12-212-0/+1205
| | | | | | | | | | | Current functionality is somewhat limited: driver assumes that there is only one active IPU unit (IPU1) and that video output is DI0 and video mode is 1024x768. For more advanced functionality driver requires proper clock management which is work in progress. At the moment driver assumes that pixel clock is configured by u-boot for 1026x768 mode. Reviewed by: andrew, ian, mmel Differential Revision: https://reviews.freebsd.org/D4168
* - Add driver for i.MX 6 HDMI framergonzo2015-12-214-0/+1464
| | | | | | | - Enable HDMI driver in IMX6 config Reviewed by: andrew, ian, mmel Differential Revision: https://reviews.freebsd.org/D4174
* Add CCM functions to enable HDMI framer and IPU units (video controller)gonzo2015-12-213-0/+55
| | | | | Reviewed by: andrew, ian Differential Revision: https://reviews.freebsd.org/D4168
* [intrng] Migrate the intrng code from sys/arm/arm to sys/kern/subr_intr.c.adrian2015-12-182-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ci20 port (by kan@) is going to reuse almost all of the intrng code since the SoC in question looks suspiciously like someone took an ARM SoC design and replaced the ARM core with a MIPS core. * migrate out the code; * rename ARM_ -> INTR_; * rename arm_ -> intr_; * move the interrupt flush routine from intr.c / intrng.c into arm/machdep_intr.c - removing the code duplication and removing the ARM specific bits from here. Thanks to the Star Wars: The Force Awakens premiere line for allowing me a couple hours of quiet time to finish the universe builds. Tested: * make universe TODO: * The structure definitions in subr_intr.c still includes machine/intr.h which requires one duplicates all of the intrng definitions in the platform code (which kan has done, and I think we don't have to.) Instead I should break out the generic things (function declarations, common intr structures, etc) into a separate header. * Kan has requested I make the PIC based IPI stuff optional.
* Fix the clock divisor calc for imx6 sdcard bus speed.ian2015-12-181-2/+9
| | | | | | | | I don't know what alternate universe I was inhabiting when I wrote it originally, but apparently the basic workings of mathematics were different than in this universe. I also can't explain how it ever worked, except "by accident", because completely bogus values were being written into the divisor register.
* Move the DRIVER_MODULE() statements that declare mmc(4) to be a child ofian2015-12-141-1/+1
| | | | | | the various bridge drivers out of dev/mmc.c and into the bridge drivers. Requested by: jhb (almost two years ago; better late than never)
* Rename sysctl node hw.imx6 to hw.imx. Move its definition to imx_machdep.cian2015-11-265-10/+42
| | | | | | | | so that code shared between imx5 and imx6 can work with OIDs under that node. Add last_reset_status (integer) and last_reset_reason (string) OIDs that provide info about the last chip reset (power-on, software reset, watchdog timeout).
* Update the imx5/imx6 cpu_reset() implementation based on a new understandingian2015-11-211-6/+4
| | | | | | of the SRS (software reset) bit in the watchdog control register. Despite what the manual seems to imply, this bit DOES trigger an immediate reset, as opposed to simply flagging the type of reset as software-triggered.
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