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author | mmel <mmel@FreeBSD.org> | 2016-02-05 14:57:41 +0000 |
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committer | mmel <mmel@FreeBSD.org> | 2016-02-05 14:57:41 +0000 |
commit | fd38ead294ac15adc73d80d72d44517a82502ac2 (patch) | |
tree | 6130734e3c63fce61c81af1c7daaa057a0ec3c6c /sys/arm/freescale | |
parent | f58eb974cee99ed66fc09089b6d118039edfc098 (diff) | |
download | FreeBSD-src-fd38ead294ac15adc73d80d72d44517a82502ac2.zip FreeBSD-src-fd38ead294ac15adc73d80d72d44517a82502ac2.tar.gz |
ARM: Use new ARMv6 naming conventions for cache and TLB functions
in all but ARMv4 specific files.
Expand ARMv6 compatibility stubs in cpu-v4.h. Use physical address
in L2 cache functions if ARM_L2_PIPT is defined.
Diffstat (limited to 'sys/arm/freescale')
-rw-r--r-- | sys/arm/freescale/imx/imx6_mp.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arm/freescale/imx/imx6_mp.c b/sys/arm/freescale/imx/imx6_mp.c index 3208f67..7aa9aab 100644 --- a/sys/arm/freescale/imx/imx6_mp.c +++ b/sys/arm/freescale/imx/imx6_mp.c @@ -37,6 +37,7 @@ __FBSDID("$FreeBSD$"); #include <vm/vm.h> #include <vm/pmap.h> +#include <machine/cpu.h> #include <machine/smp.h> #include <machine/fdt.h> #include <machine/intr.h> @@ -149,7 +150,7 @@ platform_mp_start_ap(void) val = bus_space_read_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG); bus_space_write_4(fdtbus_bs_tag, scu, SCU_CONTROL_REG, val | SCU_CONTROL_ENABLE); - cpu_idcache_wbinv_all(); + dcache_wbinv_poc_all(); /* * For each AP core, set the entry point address and argument registers, |