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* Missing break in switch case.araujo2015-04-231-0/+1
* Relax the check on which vectors can be delivered through the APIC. Accordingneel2015-04-161-1/+5
* Prefer 'vcpu_should_yield()' over checking 'curthread->td_flags' directly.neel2015-04-161-1/+1
* Enhance the support for Group 1 Extended opcodes:tychon2015-04-061-38/+84
* Fix "MOVS" instruction memory to MMIO emulation. Currently updates totychon2015-04-013-34/+53
* Fix the RTC device model to operate correctly in 12-hour mode. The followingneel2015-03-281-6/+41
* When fetching an instruction in non-64bit mode, consider the value of thetychon2015-03-244-6/+19
* Report ARAT (APIC-Timer-always-running) feature for virtual CPU.mav2015-03-161-0/+6
* Use lapic_ipi_alloc() to dynamically allocate IPI slots needed by bhyve whenneel2015-03-148-184/+8
* When ICW1 is issued the edge sense circuit is reset which means thattychon2015-03-061-0/+1
* Fix warnings/errors when building vmm.ko with gcc:neel2015-03-022-6/+12
* Allow passthrough devices to be hinted.rstone2015-03-012-34/+51
* Always emulate MSR_PAT on Intel processors and don't rely on PAT save/restoreneel2015-02-244-22/+56
* Add x2APIC support. Enable it by default if CPU is capable. Thekib2015-02-091-5/+6
* Add macro to identify AVIC capability (advanced virtual interrupt controller)neel2015-01-241-0/+1
* MOVS instruction emulation.neel2015-01-191-4/+267
* Simplify instruction restart logic in bhyve.neel2015-01-183-16/+62
* Fix typo (missing comma).neel2015-01-141-1/+1
* 'struct vm_exception' was intended to be used only as the collateral for theneel2015-01-134-51/+54
* Clear blocking due to STI or MOV SS in the hypervisor when an instruction isneel2015-01-065-27/+55
* Initialize all fields of 'struct vm_exception exception' before passing it toneel2014-12-301-2/+5
* Replace bhyve's minimal RTC emulation with a fully featured one in vmm.ko.neel2014-12-306-61/+1051
* Inject #UD into the guest when it executes either 'MONITOR' or 'MWAIT' onneel2014-12-302-0/+15
* Implement "special mask mode" in vatpic.neel2014-12-281-4/+25
* Allow ktr(4) tracing of all guest exceptions via the tunableneel2014-12-235-17/+175
* Emulate writes to the IA32_MISC_ENABLE MSR.neel2014-12-201-2/+24
* Various 8259 device model improvements:neel2014-12-201-4/+37
* Fix 8259 IRQ priority resolver.neel2014-12-171-18/+28
* For level triggered interrupts clear the PIC IRR bit when the interrupt pinneel2014-12-161-0/+2
* Change the lower bound for guest vmspace allocation to 0 instead ofgrehan2014-11-231-1/+1
* Reported by: Coverityaraujo2014-10-281-0/+1
* Remove bhyve SVM feature printf's now that they are available in thegrehan2014-10-271-21/+0
* Change the type of the first argument to the I/O emulation handlers toneel2014-10-267-16/+16
* Move the ACPI PM timer emulation into vmm.ko.neel2014-10-264-0/+159
* Don't pass the 'error' return from an I/O port handler directly to vm_run().neel2014-10-261-21/+27
* IFC @r273214neel2014-10-202-2/+2
* IFC @r273206neel2014-10-192-21/+78
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| * Follow up to r225617. In order to maximize the re-usability of kernel codedavide2014-10-161-1/+1
| * Emulate "POP r/m".neel2014-10-141-20/+77
* | Don't advertise the "OS visible workarounds" feature in cpuid.80000001H:ECX.neel2014-10-191-6/+23
* | Don't advertise support for the NodeID MSR since bhyve doesn't emulate it.neel2014-10-181-0/+3
* | Don't advertise the Instruction Based Sampling feature because it requiresneel2014-10-171-0/+5
* | Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 inneel2014-10-171-0/+8
* | Use the correct fault type (VM_PROT_EXECUTE) for an instruction fetch.neel2014-10-161-0/+2
* | Fix topology enumeration issues exposed by AMD Bulldozer Family 15h processor.neel2014-10-161-2/+24
* | Actually hide the SVM capability by clearing CPUID.80000001H:ECX[bit 3]neel2014-10-151-2/+6
* | Remove extraneous comments.neel2014-10-111-22/+6
* | Get rid of unused headers.neel2014-10-113-193/+126
* | Get rid of unused forward declaration of 'struct svm_softc'.neel2014-10-111-2/+1
* | style(9) fixes.neel2014-10-111-8/+1
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