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| author | neel <neel@FreeBSD.org> | 2014-10-19 21:38:58 +0000 |
|---|---|---|
| committer | neel <neel@FreeBSD.org> | 2014-10-19 21:38:58 +0000 |
| commit | 13e9198693c3c4ccfd604fbab375f3b96aa149dc (patch) | |
| tree | c45508095a7f02a510b85eb4b45e91e94ae6e3cb /sys/amd64/vmm | |
| parent | d5ca76422abad1ccdac4e125d13cef3d28025dc3 (diff) | |
| download | FreeBSD-src-13e9198693c3c4ccfd604fbab375f3b96aa149dc.zip FreeBSD-src-13e9198693c3c4ccfd604fbab375f3b96aa149dc.tar.gz | |
Don't advertise the "OS visible workarounds" feature in cpuid.80000001H:ECX.
bhyve doesn't emulate the MSRs needed to support this feature at this time.
Don't expose any model-specific RAS and performance monitoring features in
cpuid leaf 80000007H.
Emulate a few more MSRs for AMD: TSEG base address, TSEG address mask and
BIOS signature and P-state related MSRs.
This eliminates all the unimplemented MSRs accessed by Linux/x86_64 kernels
2.6.32, 3.10.0 and 3.17.0.
Diffstat (limited to 'sys/amd64/vmm')
| -rw-r--r-- | sys/amd64/vmm/x86.c | 29 |
1 files changed, 23 insertions, 6 deletions
diff --git a/sys/amd64/vmm/x86.c b/sys/amd64/vmm/x86.c index cf0b54b..c0c3e9c 100644 --- a/sys/amd64/vmm/x86.c +++ b/sys/amd64/vmm/x86.c @@ -174,6 +174,9 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, /* NodeID MSR not available */ regs[2] &= ~AMDID2_NODE_ID; + /* Don't advertise the OS visible workaround feature */ + regs[2] &= ~AMDID2_OSVW; + /* * Hide rdtscp/ia32_tsc_aux until we know how * to deal with them. @@ -182,11 +185,25 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, break; case CPUID_8000_0007: - cpuid_count(*eax, *ecx, regs); /* - * If the host TSCs are not synchronized across - * physical cpus then we cannot advertise an - * invariant tsc to a vcpu. + * AMD uses this leaf to advertise the processor's + * power monitoring and RAS capabilities. These + * features are hardware-specific and exposing + * them to a guest doesn't make a lot of sense. + * + * Intel uses this leaf only to advertise the + * "Invariant TSC" feature with all other bits + * being reserved (set to zero). + */ + regs[0] = 0; + regs[1] = 0; + regs[2] = 0; + regs[3] = 0; + + /* + * "Invariant TSC" can be advertised to the guest if: + * - host TSC frequency is invariant + * - host TSCs are synchronized across physical cpus * * XXX This still falls short because the vcpu * can observe the TSC moving backwards as it @@ -194,8 +211,8 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, * it should discourage the guest from using the * TSC to keep track of time. */ - if (!smp_tsc) - regs[3] &= ~AMDPM_TSC_INVARIANT; + if (tsc_is_invariant && smp_tsc) + regs[3] |= AMDPM_TSC_INVARIANT; break; case CPUID_0000_0001: |
