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| author | neel <neel@FreeBSD.org> | 2014-10-17 03:04:38 +0000 |
|---|---|---|
| committer | neel <neel@FreeBSD.org> | 2014-10-17 03:04:38 +0000 |
| commit | b194fc5a2b8dd89544329e2aaa9569f23c24b990 (patch) | |
| tree | 114478797f2adac781c8ea176c9929af8edd737b /sys/amd64/vmm | |
| parent | 7108d4bd756dc60f02abfc957c668af4820022cc (diff) | |
| download | FreeBSD-src-b194fc5a2b8dd89544329e2aaa9569f23c24b990.zip FreeBSD-src-b194fc5a2b8dd89544329e2aaa9569f23c24b990.tar.gz | |
Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 in
CPUID.80000001H:ECX.
Handle accesses to PerfCtrX and PerfEvtSelX MSRs by ignoring writes and
returning 0 on reads.
This further reduces the number of unimplemented MSRs hit by a Linux guest
during boot.
Diffstat (limited to 'sys/amd64/vmm')
| -rw-r--r-- | sys/amd64/vmm/x86.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sys/amd64/vmm/x86.c b/sys/amd64/vmm/x86.c index 9140805..3c5ca19 100644 --- a/sys/amd64/vmm/x86.c +++ b/sys/amd64/vmm/x86.c @@ -159,6 +159,14 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, regs[2] &= ~(AMDID2_SVM | AMDID2_TOPOLOGY); /* + * Don't advertise extended performance counter MSRs + * to the guest. + */ + regs[2] &= ~AMDID2_PCXC; + regs[2] &= ~AMDID2_PNXC; + regs[2] &= ~AMDID2_PTSCEL2I; + + /* * Hide rdtscp/ia32_tsc_aux until we know how * to deal with them. */ |
