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authoroharboe <oharboe>2008-05-04 20:44:27 +0000
committeroharboe <oharboe>2008-05-04 20:44:27 +0000
commitb93ac48f3c323a11a97a39338897c521780a16b9 (patch)
tree5c5bc256a988334970f821be5b7f18159f6bd519 /zpu/hdl/sim
parent1362bd4ace3ce962ed744a153e5f969154bb6682 (diff)
downloadzpu-b93ac48f3c323a11a97a39338897c521780a16b9.zip
zpu-b93ac48f3c323a11a97a39338897c521780a16b9.tar.gz
* moved ZPU core files to seperate folder
* deleted some obsolete files
Diffstat (limited to 'zpu/hdl/sim')
-rw-r--r--zpu/hdl/sim/dmipssmalltrace.do26
-rw-r--r--zpu/hdl/sim/dmipstrace.do30
2 files changed, 56 insertions, 0 deletions
diff --git a/zpu/hdl/sim/dmipssmalltrace.do b/zpu/hdl/sim/dmipssmalltrace.do
new file mode 100644
index 0000000..eb4c6fe
--- /dev/null
+++ b/zpu/hdl/sim/dmipssmalltrace.do
@@ -0,0 +1,26 @@
+set BreakOnAssertion 1
+vlib work
+
+vcom -93 -explicit zpu_config_trace.vhd
+vcom -93 -explicit zpupkg.vhd
+vcom -93 -explicit txt_util.vhd
+vcom -93 -explicit sim_fpga_top.vhd
+vcom -93 -explicit zpu_core_small.vhd
+vcom -93 -explicit bram_dmips.vhd
+vcom -93 -explicit dram_dmips.vhd
+vcom -93 -explicit timer.vhd
+vcom -93 -explicit io.vhd
+vcom -93 -explicit trace.vhd
+
+
+vsim fpga_top
+view wave
+
+add wave -recursive fpga_top/zpu/*
+#--add wave -recursive fpga_top/ioMap/*
+#add wave -recursive fpga_top/*
+view structure
+
+
+# run ZPU
+run 5 ms
diff --git a/zpu/hdl/sim/dmipstrace.do b/zpu/hdl/sim/dmipstrace.do
new file mode 100644
index 0000000..64cf8fd
--- /dev/null
+++ b/zpu/hdl/sim/dmipstrace.do
@@ -0,0 +1,30 @@
+# Xilinx WebPack modelsim script
+#
+# cd C:/workspace/zpu/zpu/hdl/zpu4/src
+# do dmipstrace.do
+
+set BreakOnAssertion 1
+vlib work
+
+vcom -93 -explicit zpu_config_trace.vhd
+vcom -93 -explicit zpupkg.vhd
+vcom -93 -explicit txt_util.vhd
+vcom -93 -explicit sim_fpga_top.vhd
+vcom -93 -explicit zpu_core.vhd
+vcom -93 -explicit dram_dmips.vhd
+vcom -93 -explicit timer.vhd
+vcom -93 -explicit io.vhd
+vcom -93 -explicit trace.vhd
+
+
+vsim fpga_top
+view wave
+
+add wave -recursive fpga_top/zpu/*
+#--add wave -recursive fpga_top/ioMap/*
+#add wave -recursive fpga_top/*
+view structure
+
+
+# run ZPU
+run 5 ms
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