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authoroharboe <oharboe>2008-05-04 20:44:27 +0000
committeroharboe <oharboe>2008-05-04 20:44:27 +0000
commitb93ac48f3c323a11a97a39338897c521780a16b9 (patch)
tree5c5bc256a988334970f821be5b7f18159f6bd519 /zpu/hdl
parent1362bd4ace3ce962ed744a153e5f969154bb6682 (diff)
downloadzpu-b93ac48f3c323a11a97a39338897c521780a16b9.zip
zpu-b93ac48f3c323a11a97a39338897c521780a16b9.tar.gz
* moved ZPU core files to seperate folder
* deleted some obsolete files
Diffstat (limited to 'zpu/hdl')
-rw-r--r--zpu/hdl/example/simzpu_small.do4
-rw-r--r--zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh (renamed from zpu/hdl/zpu4/src/dmipssmalltrace_ghdl.sh)0
-rw-r--r--zpu/hdl/example_ghdl/dmipstrace_ghdl.sh (renamed from zpu/hdl/zpu4/src/dmipstrace_ghdl.sh)0
-rw-r--r--zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh (renamed from zpu/hdl/zpu4/src/simzpu_medium_ghdl.sh)0
-rw-r--r--zpu/hdl/example_medium/sim_fpga_top.vhd (renamed from zpu/hdl/zpu4/src/sim_fpga_top.vhd)0
-rw-r--r--zpu/hdl/example_medium/simzpu_medium.do (renamed from zpu/hdl/zpu4/src/simzpu_medium.do)0
-rw-r--r--zpu/hdl/sim/dmipssmalltrace.do (renamed from zpu/hdl/zpu4/src/dmipssmalltrace.do)0
-rw-r--r--zpu/hdl/sim/dmipstrace.do (renamed from zpu/hdl/zpu4/src/dmipstrace.do)0
-rw-r--r--zpu/hdl/zpu4/core/zpu_config.vhd (renamed from zpu/hdl/zpu4/src/zpu_config.vhd)0
-rw-r--r--zpu/hdl/zpu4/core/zpu_core.vhd (renamed from zpu/hdl/zpu4/src/zpu_core.vhd)0
-rw-r--r--zpu/hdl/zpu4/core/zpu_core_small.vhd (renamed from zpu/hdl/zpu4/src/zpu_core_small.vhd)0
-rw-r--r--zpu/hdl/zpu4/core/zpu_core_small_wip.vhd (renamed from zpu/hdl/zpu4/src/zpu_core_small_wip.vhd)0
-rw-r--r--zpu/hdl/zpu4/core/zpupkg.vhd (renamed from zpu/hdl/zpu4/src/zpupkg.vhd)0
-rw-r--r--zpu/hdl/zpu4/src/log.txt380
-rw-r--r--zpu/hdl/zpu4/src/niltrace.vhd26
-rw-r--r--zpu/hdl/zpu4/src/testlut.vhd114
16 files changed, 2 insertions, 522 deletions
diff --git a/zpu/hdl/example/simzpu_small.do b/zpu/hdl/example/simzpu_small.do
index 095069a..12d231b 100644
--- a/zpu/hdl/example/simzpu_small.do
+++ b/zpu/hdl/example/simzpu_small.do
@@ -8,10 +8,10 @@ set BreakOnAssertion 1
vlib work
vcom -93 -explicit zpu_config.vhd
-vcom -93 -explicit ../zpu4/src/zpupkg.vhd
+vcom -93 -explicit ../zpu4/core/zpupkg.vhd
vcom -93 -explicit ../zpu4/src/txt_util.vhd
vcom -93 -explicit sim_small_fpga_top.vhd
-vcom -93 -explicit ../zpu4/src/zpu_core_small.vhd
+vcom -93 -explicit ../zpu4/core/zpu_core_small.vhd
vcom -93 -explicit helloworld.vhd
vcom -93 -explicit ../zpu4/src/timer.vhd
vcom -93 -explicit ../zpu4/src/io.vhd
diff --git a/zpu/hdl/zpu4/src/dmipssmalltrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh
index 5e43b64..5e43b64 100644
--- a/zpu/hdl/zpu4/src/dmipssmalltrace_ghdl.sh
+++ b/zpu/hdl/example_ghdl/dmipssmalltrace_ghdl.sh
diff --git a/zpu/hdl/zpu4/src/dmipstrace_ghdl.sh b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
index 3be392f..3be392f 100644
--- a/zpu/hdl/zpu4/src/dmipstrace_ghdl.sh
+++ b/zpu/hdl/example_ghdl/dmipstrace_ghdl.sh
diff --git a/zpu/hdl/zpu4/src/simzpu_medium_ghdl.sh b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh
index 7a7f3df..7a7f3df 100644
--- a/zpu/hdl/zpu4/src/simzpu_medium_ghdl.sh
+++ b/zpu/hdl/example_ghdl/simzpu_medium_ghdl.sh
diff --git a/zpu/hdl/zpu4/src/sim_fpga_top.vhd b/zpu/hdl/example_medium/sim_fpga_top.vhd
index 29151af..29151af 100644
--- a/zpu/hdl/zpu4/src/sim_fpga_top.vhd
+++ b/zpu/hdl/example_medium/sim_fpga_top.vhd
diff --git a/zpu/hdl/zpu4/src/simzpu_medium.do b/zpu/hdl/example_medium/simzpu_medium.do
index a6c1fe2..a6c1fe2 100644
--- a/zpu/hdl/zpu4/src/simzpu_medium.do
+++ b/zpu/hdl/example_medium/simzpu_medium.do
diff --git a/zpu/hdl/zpu4/src/dmipssmalltrace.do b/zpu/hdl/sim/dmipssmalltrace.do
index eb4c6fe..eb4c6fe 100644
--- a/zpu/hdl/zpu4/src/dmipssmalltrace.do
+++ b/zpu/hdl/sim/dmipssmalltrace.do
diff --git a/zpu/hdl/zpu4/src/dmipstrace.do b/zpu/hdl/sim/dmipstrace.do
index 64cf8fd..64cf8fd 100644
--- a/zpu/hdl/zpu4/src/dmipstrace.do
+++ b/zpu/hdl/sim/dmipstrace.do
diff --git a/zpu/hdl/zpu4/src/zpu_config.vhd b/zpu/hdl/zpu4/core/zpu_config.vhd
index a13c0bf..a13c0bf 100644
--- a/zpu/hdl/zpu4/src/zpu_config.vhd
+++ b/zpu/hdl/zpu4/core/zpu_config.vhd
diff --git a/zpu/hdl/zpu4/src/zpu_core.vhd b/zpu/hdl/zpu4/core/zpu_core.vhd
index 37fa2d1..37fa2d1 100644
--- a/zpu/hdl/zpu4/src/zpu_core.vhd
+++ b/zpu/hdl/zpu4/core/zpu_core.vhd
diff --git a/zpu/hdl/zpu4/src/zpu_core_small.vhd b/zpu/hdl/zpu4/core/zpu_core_small.vhd
index 9cda01c..9cda01c 100644
--- a/zpu/hdl/zpu4/src/zpu_core_small.vhd
+++ b/zpu/hdl/zpu4/core/zpu_core_small.vhd
diff --git a/zpu/hdl/zpu4/src/zpu_core_small_wip.vhd b/zpu/hdl/zpu4/core/zpu_core_small_wip.vhd
index 8d87804..8d87804 100644
--- a/zpu/hdl/zpu4/src/zpu_core_small_wip.vhd
+++ b/zpu/hdl/zpu4/core/zpu_core_small_wip.vhd
diff --git a/zpu/hdl/zpu4/src/zpupkg.vhd b/zpu/hdl/zpu4/core/zpupkg.vhd
index f3800b0..f3800b0 100644
--- a/zpu/hdl/zpu4/src/zpupkg.vhd
+++ b/zpu/hdl/zpu4/core/zpupkg.vhd
diff --git a/zpu/hdl/zpu4/src/log.txt b/zpu/hdl/zpu4/src/log.txt
deleted file mode 100644
index 7a82879..0000000
--- a/zpu/hdl/zpu4/src/log.txt
+++ /dev/null
@@ -1,380 +0,0 @@
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diff --git a/zpu/hdl/zpu4/src/niltrace.vhd b/zpu/hdl/zpu4/src/niltrace.vhd
deleted file mode 100644
index 40fc1ca..0000000
--- a/zpu/hdl/zpu4/src/niltrace.vhd
+++ /dev/null
@@ -1,26 +0,0 @@
-library ieee;
-use ieee.std_logic_1164.all;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
-use std.textio.all;
-use work.zpu_config.all;
-
-
-entity trace is
- port(
- clk : in std_logic;
- begin_inst : in std_logic;
- pc : in std_logic_vector(maxAddrBit downto 0);
- opcode : in std_logic_vector(7 downto 0);
- sp : in std_logic_vector(maxAddrBit downto 2);
- memA : in std_logic_vector(wordSize-1 downto 0);
- busy : in std_logic);
-end trace;
-
-
-architecture behave of trace is
-
-begin
-
-end behave;
-
diff --git a/zpu/hdl/zpu4/src/testlut.vhd b/zpu/hdl/zpu4/src/testlut.vhd
deleted file mode 100644
index 668efcc..0000000
--- a/zpu/hdl/zpu4/src/testlut.vhd
+++ /dev/null
@@ -1,114 +0,0 @@
--- Company: Zylin AS
---
--- Hooks up the ZPU to physical pads to ensure that it is not optimized to
--- oblivion. This is purely to have something to measure LUT usage against.
---
-library IEEE;
-use IEEE.STD_LOGIC_1164.ALL;
-use IEEE.STD_LOGIC_UNSIGNED.ALL;
-
-library work;
-use work.zpu_config.all;
-use work.zpupkg.all;
-
-entity ic300 is
- port ( -- Clock inputs
- cpu_clk_p : in std_logic;
-
- -- CPU interface signals
- cpu_a_p : in std_logic_vector(20 downto 0);
- cpu_wr_n_p : in std_logic_vector(1 downto 0);
- cpu_cs_n_p : in std_logic_vector(3 downto 1);
- cpu_oe_n_p : in std_logic;
- cpu_d_p : out std_logic_vector(15 downto 0);
- cpu_irq_p : out std_logic_vector(1 downto 0);
- cpu_fiq_p : out std_logic;
- cpu_wait_n_p : out std_logic;
-
- sdr_clk_fb_p : in std_logic -- DDR clock feedback
- );
-end ic300;
-
-architecture behave of ic300 is
-
-
-signal io_busy : std_logic;
-signal io_read : std_logic_vector(7 downto 0);
-signal io_write : std_logic_vector(7 downto 0);
-signal io_addr : std_logic_vector(maxAddrBit downto minAddrBit);
-signal io_writeEnable : std_logic;
-signal io_readEnable : std_logic;
-
-
-signal cpu_we : std_logic_vector(1 downto 0);
-signal cpu_re : std_logic;
-signal areset : std_logic;
-
--- Clock module signals
-signal clk_status : std_logic_vector(2 downto 0);
-signal cpu_clk : std_logic;
-signal cpu_clk_2x : std_logic;
-signal cpu_clk_4x : std_logic;
-signal ddr_in_clk : std_logic;
-
-
--- Internal CPU interface signals
-signal cpu_din : std_logic_vector(15 downto 0);
-signal cpu_dout : std_logic_vector(15 downto 0);
-signal cpu_a : std_logic_vector(20 downto 0);
-
-signal dummy : std_logic_vector(maxAddrBit downto minAddrBit+5);
-
-signal dummy2 : std_logic_vector(wordSize-1 downto 0);
-signal dummy3 : std_logic_vector(wordSize-1 downto 0);
-signal dummy4 : std_logic_vector(wordSize-1 downto 0);
-begin
-
- areset <= '0'; -- MUST BE CHANGED TO SOMETHING CORRECT
-
--- cpu_d_p <= (others => '0');
- cpu_irq_p <= (others => '0');
- cpu_fiq_p <= '0';
- cpu_wait_n_p <= '0';
-
- cpu_d_p(15 downto 15) <= (others => '0');
-
- -- delay signals going out/in w/1 clk so the
- -- ZPU does not have to drive those pins.
- --
- -- these registers can be placed close to the ZPU and these
- -- registers then have a full clock to drive the pins.
- process(cpu_clk_p, areset)
- begin
- if (cpu_clk_p'event and cpu_clk_p = '1') then
- cpu_d_p(0) <= io_writeEnable;
- cpu_d_p(1) <= io_readEnable;
- cpu_d_p(9 downto 2) <= io_write;
- io_read <= cpu_a_p(7 downto 0);
- -- 32 read/write registers is plenty realisitic for a minimal size
- -- soft-CPU
- cpu_d_p(14 downto 10) <= io_addr(minAddrBit+4 downto minAddrBit);
- end if;
- end process;
-
-
- zpu: zpu_core port map (
- clk => cpu_clk_p ,
- areset => areset,
- enable => '1',
-
- in_mem_busy => '0',
- out_mem_writeEnable => io_writeEnable,
- out_mem_readEnable => io_readEnable,
- mem_write(7 downto 0) => io_write,
- mem_write(wordSize-1 downto 8) => dummy3(wordSize-1 downto 8),
- mem_read(7 downto 0) => io_read,
- mem_read(wordSize-1 downto 8) => dummy2(wordSize-1 downto 8),
- out_mem_addr(maxAddrBitIncIO) => dummy4(maxAddrBitIncIO),
- out_mem_addr(minAddrBit-1 downto 0) => dummy4(minAddrBit-1 downto 0) ,
- out_mem_addr(maxAddrBit downto minAddrBit) => io_addr,
- interrupt => '0'
- );
-
-
-end behave;
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