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path: root/src/soc/intel/fsp_baytrail
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* Remove empty lines at end of fileElyes HAOUAS2015-06-081-1/+0
* device_ops: add device_t argument to write_acpi_tablesAlexander Couzens2015-06-052-3/+5
* device_ops: add device_t argument to acpi_fill_ssdt_generatorAlexander Couzens2015-06-051-1/+1
* device_ops: add device_t argument to acpi_inject_dsdt_generatorAlexander Couzens2015-06-052-2/+3
* devicetree: Discriminate device ops scan_bus()Kyösti Mälkki2015-06-041-1/+1
* smm: Merge configs SMM_MODULES and SMM_TSEGVladimir Serbinenko2015-05-281-1/+0
* acpigen: Remove all explicit length trackingVladimir Serbinenko2015-05-261-9/+5
* acpi: Remove monolithic ACPIVladimir Serbinenko2015-05-261-1/+0
* baytrail: Switch to per-device ACPIVladimir Serbinenko2015-05-237-24/+86
* Remove address from GPLv2 headersPatrick Georgi2015-05-2172-88/+72
* intel/fsp_baytrail: Fix SPI debuggingDavid Imhoff2015-05-041-6/+6
* intel: Correct MMIO related ACPI table settingsDave Frodin2015-05-011-3/+4
* kbuild: automatically include SOCsStefan Reinauer2015-04-291-0/+5
* fsp platforms: consolidate FspNotify callsMartin Roth2015-04-281-20/+0
* intel/fsp_baytrail: Fix default SMM_TSEG_SIZE valueDavid Imhoff2015-04-271-1/+1
* fsp: Move fsp to fsp1_0Marc Jones2015-04-248-8/+8
* build system: rename __BOOT_BLOCK__ and __VER_STAGE__Patrick Georgi2015-04-041-4/+4
* intel/fsp_baytrail: Add PCI Root Port IRQ RoutingMartin Roth2015-03-123-2/+77
* ACPI: Get S3 resume state from romstage_handoffKyösti Mälkki2015-03-102-20/+5
* coreboot: fix munged license textAaron Durbin2015-03-095-5/+5
* fsp_baytrail: Add I2C driverWerner Zeh2015-03-053-0/+396
* fsp_baytrail: Add new microcode for Bay Trail MWerner Zeh2015-03-053-9/+21
* x86: Fix pointer arithmetic regressions from MMIO changesKevin Paul Herbert2015-02-271-2/+2
* soc/fsp_baytrail: Fix use of microcode-related Kconfig variablesAlexandru Gagniuc2015-02-242-11/+9
* acpi: Generate valid ACPI processor objectsTimothy Pearson2015-02-161-19/+19
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-1511-65/+70
* fsp_baytrail: Add macros to define 20K pull-up and downWerner Zeh2015-02-131-0/+14
* Baytrail_fsp: Make ME path configurable in menuconfigWerner Zeh2015-02-101-1/+1
* fsp_baytrail: Get FSP reserved memory from the FSP HOB listMartin Roth2015-02-093-16/+8
* Intel FSP platforms: Fix timestampsKyösti Mälkki2015-02-091-5/+6
* FSP & CBMEM: Fix broken cbmem CAR transition.Martin Roth2015-02-062-1/+2
* CBMEM: Always use DYNAMIC_CBMEMKyösti Mälkki2015-01-271-2/+0
* CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEMKyösti Mälkki2015-01-274-52/+21
* CBMEM: Move cbmemc_reinit()Kyösti Mälkki2015-01-271-1/+0
* vboot2: add verstageStefan Reinauer2015-01-271-0/+1
* soc/intel/fsp_baytrail/gpio.c: Silence unused variable warningEdward O'Callaghan2015-01-131-2/+5
* Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'"Kyösti Mälkki2015-01-061-2/+11
* Re-factor 'to_flash_offset()' into 'spi_flash.h'Edward O'Callaghan2015-01-061-11/+2
* timestamps: Switch from tsc_t to uint64_tStefan Reinauer2015-01-051-12/+7
* fsp_baytrail: Initialize LPC pads in bootblock for port 80Martin Roth2014-12-192-0/+23
* fsp_baytrail: Remove GPIO_NC1 #defineMartin Roth2014-12-191-5/+4
* baytrail SOCs: Add missing comma in gpio.hMartin Roth2014-12-191-1/+1
* fsp_baytrail: Add code to read GPIOs in romstageMartin Roth2014-12-173-1/+115
* CBMEM console: Fix boards with BROKEN_CAR_MIGRATEKyösti Mälkki2014-12-161-4/+0
* Intel FSP: Move to DYNAMIC_CBMEMKyösti Mälkki2014-12-161-0/+1
* spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.Gabe Black2014-12-091-10/+0
* spi: Remove the spi_set_speed and spi_cs_is_valid functions.Gabe Black2014-12-091-6/+0
* fsp platfoms: add prototype & consolidate main entry-pointMartin Roth2014-12-092-3/+3
* intel/fsp_baytrail: Spelling fixesMartin Roth2014-12-084-4/+5
* fsp_baytrail: Update function disable codeMartin Roth2014-12-052-51/+1
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