| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | broadwell: Clear USB3.0 PORTSC status bits in sleep_prepare. | Todd Broch | 2015-04-21 | 1 | -0/+9 |
| * | broadwell: indent xhci code | Patrick Georgi | 2015-04-21 | 1 | -17/+17 |
| * | broadwell: Disable XHCI compliance mode entry | Duncan Laurie | 2015-04-18 | 1 | -0/+19 |
| * | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner | 2015-04-07 | 1 | -3/+3 |
| * | broadwell: Fix some errors in selftest | Kane Chen | 2015-03-27 | 1 | -0/+10 |
| * | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert | 2015-02-15 | 1 | -9/+9 |
| * | broadwell: add new intel SOC | Duncan Laurie | 2014-10-22 | 1 | -0/+203 |
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index : coreboot-staging | |
| Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com | Raptor Engineering, LLC |
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