coreboot-staging - Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com

Branch	Commit message	Author	Age
4.1	x86: flatten hierarchy	Stefan Reinauer	9 years
4.2	Revert "device/pciexp_device: Tune PCIe bridges before scanning children"	Kyösti Mälkki	8 years
classic-2014.10	i945: Consolidate FADT code	Vladimir Serbinenko	10 years
experimental	Add the Rangeley FSP include & srx directories	Martin Roth	10 years
master	soc/intel/fsp_baytrail: Make sure i2c bus is < 7	Martin Roth	8 years

Tag	Download	Author	Age
4.2	coreboot-staging-4.2.zip coreboot-staging-4.2.tar.gz	Patrick Georgi	8 years
4.1	coreboot-staging-4.1.zip coreboot-staging-4.1.tar.gz	Patrick Georgi	9 years
4.0	coreboot-staging-4.0.zip coreboot-staging-4.0.tar.gz	Patrick Georgi	13 years

Age	Commit message	Author	Files	Lines
2015-07-13	x86: flatten hierarchy4.1 4.1	Stefan Reinauer	48	-94/+77
2015-07-13	x86: Port x86 over to compile cleanly with x86-64	Stefan Reinauer	13	-50/+243
2015-07-13	version: allow stating the coreboot revision in .coreboot-version	Patrick Georgi	2	-1/+4
2015-07-13	superio/smsc: Add support for SMSC DME1737	Jonathan A. Kollasch	6	-114/+30
2015-07-13	superio/smsc/dme1737: copy superio/smsc/lpc47b397	Jonathan A. Kollasch	4	-0/+271
2015-07-13	tegra124/tegra210: Include stages.h in bootblock.c	Stefan Reinauer	2	-0/+2
2015-07-13	tegra210: Fix coding style in clock.c	Stefan Reinauer	1	-7/+7
2015-07-13	coreinfo: Fix build output (cosmetical)	Stefan Reinauer	1	-18/+18
2015-07-13	smaug: Set LDO2 voltage to 1.8V	Furquan Shaikh	1	-0/+7
2015-07-13	t210: Apply A57 hardware issue workaround during cpu startup	Furquan Shaikh	2	-8/+29
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