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path: root/src/soc/intel/broadwell/romstage
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* coreboot: common stage cacheAaron Durbin2015-04-222-6/+12
* broadwell: Implement Recovery ButtonRyan Lin2015-04-211-0/+4
* broadwell: add ROM stage pre console init call backWenkai Du2015-04-181-0/+6
* broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du2015-04-101-0/+15
* console: fix Kconfig usesPatrick Georgi2015-04-081-1/+1
* broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner2015-04-0711-50/+50
* Broadwell: Pass TSC value to romstage_mainLee Leahy2015-04-041-0/+6
* Broadwell: Reg_Script: add END tag to array "smbus_init_script"Ryan Lin2015-04-021-0/+2
* broadwell: Add reporting of broadwell MCH revisionDuncan Laurie2015-04-021-3/+34
* broadwell: Change CPUID 306D4 to report "E0 or F0"Duncan Laurie2015-04-021-1/+1
* cbfs: correct types used for accessing filesAaron Durbin2015-04-011-1/+1
* broadwell: add support for smbios type17 in broadwellKane Chen2015-03-271-0/+6
* broadwell: Read and save HSIO version from ME in romstageDuncan Laurie2015-03-271-0/+4
* broadwell: Fix TCO register size and event reportingDuncan Laurie2015-03-271-3/+4
* baytrail broadwell: Use timestamps internal stashKyösti Mälkki2015-01-141-18/+5
* timestamps: Switch from tsc_t to uint64_tStefan Reinauer2015-01-051-18/+4
* broadwell: Preparations for buildingMarc Jones2014-12-313-10/+19
* intel/broadwell: Spelling fixesMartin Roth2014-12-081-1/+1
* Replace hlt with halt()Patrick Georgi2014-12-021-1/+0
* broadwell: ACPI, romstage, and other updatesDuncan Laurie2014-10-226-7/+115
* broadwell: add new intel SOCDuncan Laurie2014-10-2212-0/+1543
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