| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | coreboot: common stage cache | Aaron Durbin | 2015-04-22 | 1 | -52/+5 |
| * | Broadwell: Set boot_mode of pei_data before running reference code | Kenji Chen | 2015-04-10 | 1 | -1/+4 |
| * | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner | 2015-04-07 | 1 | -3/+3 |
| * | rmodule: use struct prog while loading rmodules | Aaron Durbin | 2015-04-03 | 1 | -8/+12 |
| * | broadwell: fix HAVE_REFCODE_BLOB build errors | Aaron Durbin | 2015-03-30 | 1 | -22/+28 |
| * | ACPI: Get S3 resume state from romstage_handoff | Kyösti Mälkki | 2015-03-10 | 1 | -10/+1 |
| * | src: Too many terminators ';;' at end of stmts, stop Skynet | Edward O'Callaghan | 2014-11-09 | 1 | -1/+1 |
| * | broadwell: add new intel SOC | Duncan Laurie | 2014-10-22 | 1 | -0/+189 |
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index : coreboot-staging | |
| Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com | Raptor Engineering, LLC |
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