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path: root/src/soc/intel/broadwell/pcie.c
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* soc/intel/broadwell: Init var before use, only use when neededMartin Roth2015-12-201-1/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* Remove address from GPLv2 headersPatrick Georgi2015-05-211-1/+1
* broadwell: Set PCIe replay timeout to 0xDDuncan Laurie2015-04-101-1/+1
* broadwell: Skip steps when disabling PCIe portDuncan Laurie2015-04-101-2/+2
* broadwell: Fix PCIe ports programming sequences to enable HSIOPCWenkai Du2015-04-101-5/+18
* Broadwell: Synchronization with FRC for Root Port Power ManagementKenji Chen2015-04-101-3/+10
* broadwell: Change all SoC headers to <soc/headername.h> systemJulius Werner2015-04-071-8/+8
* Broadwell: Fix PCIe L1 Sub-State capability ID not filled.Kenji Chen2015-04-041-1/+4
* Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings.Kenji Chen2015-04-021-0/+7
* Broadwell: Synchronize for power management with FRCKenji Chen2015-04-021-0/+11
* Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRCKenji Chen2015-04-021-2/+7
* Broadwell: Revise programming flow for write-once registersKenji Chen2015-04-021-4/+3
* broadwell: Configure IOSF Port and Grant CountKenji Chen2015-04-021-1/+25
* broadwell: Update PCIe configuration to follow BWGKane Chen2015-04-021-0/+1
* broadwell: Fix some errors in selftestKane Chen2015-03-271-0/+1
* broadwell: Apply pcie updates from 2.1.0 ref codeKane Chen2015-03-271-7/+11
* broadwell: Misc updates from 2.1.0 ref codeDuncan Laurie2015-03-271-0/+3
* intel/broadwell: Spelling fixesMartin Roth2014-12-081-4/+4
* broadwell: add new intel SOCDuncan Laurie2014-10-221-0/+632
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