| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | broadwell: Change all SoC headers to <soc/headername.h> system | Julius Werner | 2015-04-07 | 1 | -2/+2 |
| * | broadwell: Fix building with USE=quiet-cb | Duncan Laurie | 2015-04-04 | 1 | -6/+6 |
| * | broadwell: me: Fix typo and add missing phase state | Duncan Laurie | 2015-04-02 | 1 | -1/+5 |
| * | broadwell: Read and save HSIO version from ME in romstage | Duncan Laurie | 2015-03-27 | 1 | -0/+36 |
| * | intel/broadwell: Spelling fixes | Martin Roth | 2014-12-08 | 1 | -1/+1 |
| * | broadwell: ACPI, romstage, and other updates | Duncan Laurie | 2014-10-22 | 1 | -0/+3 |
| * | broadwell: add new intel SOC | Duncan Laurie | 2014-10-22 | 1 | -0/+278 |
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index : coreboot-staging | |
| Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com | Raptor Engineering, LLC |
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