| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Remove address from GPLv2 headers | Patrick Georgi | 2015-05-21 | 1 | -1/+1 |
| * | x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer | Kevin Paul Herbert | 2015-02-15 | 1 | -1/+1 |
| * | northbridge/intel: Do not define include guard as 1 | Edward O'Callaghan | 2015-01-06 | 1 | -2/+2 |
| * | intel/sch: Use MMCONF_BASE_ADDRESS | Kyösti Mälkki | 2013-06-25 | 1 | -1/+1 |
| * | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel | 2013-03-01 | 1 | -1/+1 |
| * | Fix a few whitespace and coding style issues. | Uwe Hermann | 2010-12-18 | 1 | -3/+3 |
| * | Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board | Patrick Georgi | 2010-12-18 | 1 | -0/+54 |
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index : coreboot-staging | |
| Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com | Raptor Engineering, LLC |
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