| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment | Paul Menzel | 2014-05-06 | 1 | -1/+1 |
| * | Add DDR refresh config to pei data structure. | Shawn Nematbakhsh | 2013-12-01 | 1 | -0/+8 |
| * | Add support to enable/disable builtin GbE (again) | Stefan Reinauer | 2013-06-28 | 1 | -1/+2 |
| * | Revert "Add support to enable/disable builtin GbE" | Kyösti Mälkki | 2013-06-27 | 1 | -2/+1 |
| * | Add support to enable/disable builtin GbE | Stefan Reinauer | 2013-06-21 | 1 | -1/+2 |
| * | Add Intel Panther Point USB3 initialization | Marc Jones | 2013-03-09 | 1 | -1/+11 |
| * | Add PCIe init and NMode flag to PEI data structure | Stefan Reinauer | 2012-11-14 | 1 | -1/+12 |
| * | Add ddr3lv_support flag to pei_data structure | Duncan Laurie | 2012-11-14 | 1 | -1/+2 |
| * | pei_data.h: Fix comment | Marc Jones | 2012-11-14 | 1 | -0/+3 |
| * | Provide MRC with a console printing callback function | Vadim Bendebury | 2012-11-14 | 1 | -1/+3 |
| * | Add support for Intel Sandybridge CPU (northbridge part) | Stefan Reinauer | 2012-04-05 | 1 | -0/+98 |
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index : coreboot-staging | |
| Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com | Raptor Engineering, LLC |
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