coreboot-staging - Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com

	Commit message (Expand)	Author	Age	Files	Lines
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	northbridge/intel: Use DEVICE_NOOP macro over dummy symbol	Edward O'Callaghan	2014-11-01	1	-6/+3
*	CBMEM northbridges: Remove references to global high_tables_base	Kyösti Mälkki	2013-09-11	1	-4/+1
*	Fix MMCONF_SUPPORT_DEFAULT for ramstage	Kyösti Mälkki	2013-07-10	1	-5/+1
*	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel	2013-03-01	1	-1/+1
*	Drop CONFIG_WRITE_HIGH_TABLES	Stefan Reinauer	2013-02-28	1	-5/+0
*	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer	2013-02-14	1	-1/+1
*	sconfig: rename pci_domain -> domain	Stefan Reinauer	2013-02-14	1	-1/+1
*	Remove assembly coded log2 function	Ronald G. Minnich	2012-11-28	1	-1/+0
*	Remove chip.h files without config structure	Kyösti Mälkki	2012-10-07	1	-1/+0
*	Cleanup coreboot memory table includes	Kyösti Mälkki	2012-08-08	1	-1/+0
*	i5000: Fix resource allocation	Sven Schnelle	2012-07-16	1	-50/+54
*	i5000: Add PCI ids for all i5000 flavours	Sven Schnelle	2012-07-06	1	-1/+8
*	Add Intel i5000 Memory Controller Hub	Sven Schnelle	2012-02-02	1	-0/+188