coreboot-staging - Partial non-authoritative staging tree (partial copy of Raptor Engineering's internal coreboot staging tree) Don't use unless Gerrit is malfunctioning or down! https://www.raptorengineering.com

	Commit message (Expand)	Author	Age	Files	Lines
*	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh	2014-05-03	1	-1/+0
*	AMD K8 (rev-F): Always have RAMINIT_SYSINFO	Kyösti Mälkki	2013-12-29	1	-1/+0
*	AMD: Drop empty root_complex	Kyösti Mälkki	2013-06-24	1	-1/+0
*	amdk8/amdfam10: Use CAR_GLOBAL for sysinfo	Patrick Georgi	2012-11-28	1	-4/+0
*	VIA southbridge K8T890: Apply un-written naming rules	Kyösti Mälkki	2012-03-16	1	-0/+1
*	Get rid of the old romstage-as-bootblock ROM layout	Patrick Georgi	2011-10-28	1	-1/+0
*	Use subsystem id from devicetree.cb instead of Kconfig and move	Sven Schnelle	2011-03-01	1	-4/+0
*	Move "select CACHE_AS_RAM" lines from boards into CPU socket.	Uwe Hermann	2010-12-08	1	-1/+0
*	S3 support for ASUS M2V	Tobias Diedrich	2010-11-24	1	-0/+1
*	The only southbridge having a pirq_assign_irqs function (needed for	Tobias Diedrich	2010-11-17	1	-0/+1
*	Move the SET_FIDVID* family of configuration options to Kconfig and	Patrick Georgi	2010-11-16	1	-0/+1
*	Add mptable for ASUS M2V.	Tobias Diedrich	2010-11-10	1	-0/+1
*	Add acpi tables and dsdt.	Tobias Diedrich	2010-11-09	1	-0/+1
*	Add pirq table for ASUS M2V.	Tobias Diedrich	2010-11-09	1	-0/+5
*	Should be part of 6044. I forgot to add the directory :/	Tobias Diedrich	2010-11-07	1	-0/+77