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Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/i3100/i3100_early_lpc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/southbridge/intel/i3100/i3100_early_lpc.c b/src/southbridge/intel/i3100/i3100_early_lpc.c index 97d2b7c..3397aff 100644 --- a/src/southbridge/intel/i3100/i3100_early_lpc.c +++ b/src/southbridge/intel/i3100/i3100_early_lpc.c @@ -25,6 +25,9 @@ static void i3100_enable_superio(void) /* Enable decoding of I/O locations for SuperIO devices */ pci_write_config16(dev, 0x80, 0x0010); pci_write_config16(dev, 0x82, 0x340f); + + /* Enable the SERIRQs (start pulse width is 8 clock cycles) */ + pci_write_config8(dev, 0x64, 0xD2); } static void i3100_halt_tco_timer(void) |