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-rw-r--r--src/northbridge/intel/i945/raminit.c33
1 files changed, 0 insertions, 33 deletions
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 046f5f8..6943fd9 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -3183,36 +3183,3 @@ void sdram_initialize(int boot_path, const u8 *spd_addresses)
sdram_setup_processor_side();
}
-
-unsigned long get_top_of_ram(void)
-{
- u32 tom;
-
- if (pci_read_config8(PCI_DEV(0, 0x0, 0), DEVEN) & ((1 << 4) | (1 << 3))) {
- /* IGD enabled, get top of Memory from BSM register */
- tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
- } else {
- tom = (pci_read_config8(PCI_DEV(0,0,0), TOLUD) & 0xf7) << 24;
- }
-
- /* if TSEG enabled subtract size */
- switch(pci_read_config8(PCI_DEV(0, 0, 0), ESMRAM)) {
- case 0x01:
- /* 1MB TSEG */
- tom -= 0x10000;
- break;
- case 0x03:
- /* 2MB TSEG */
- tom -= 0x20000;
- break;
- case 0x05:
- /* 8MB TSEG */
- tom -= 0x80000;
- break;
- default:
- /* TSEG either disabled or invalid */
- break;
- }
- return (unsigned long) tom;
-}
-
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