diff options
| -rw-r--r-- | src/mainboard/getac/p470/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/roda/rk886ex/romstage.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/i440lx/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/i440lx/raminit.c | 8 | ||||
| -rw-r--r-- | src/northbridge/via/vt8601/Kconfig | 1 | ||||
| -rw-r--r-- | src/northbridge/via/vt8601/raminit.c | 2 |
7 files changed, 10 insertions, 8 deletions
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index 7c55d0c..0809926 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -379,7 +379,7 @@ void main(unsigned long bist) #if CONFIG_HAVE_ACPI_RESUME == 0 /* When doing resume, we must not overwrite RAM */ -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); { diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 0b5c9c9..337d856 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -295,7 +295,7 @@ void main(unsigned long bist) #if !CONFIG_HAVE_ACPI_RESUME #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8 -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); #endif diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index a3e9665..1fdcd0b 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -355,7 +355,7 @@ void main(unsigned long bist) #if !CONFIG_HAVE_ACPI_RESUME #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8 -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP sdram_dump_mchbar_registers(); { diff --git a/src/northbridge/intel/i440lx/Kconfig b/src/northbridge/intel/i440lx/Kconfig index cff3aac..e7119c5 100644 --- a/src/northbridge/intel/i440lx/Kconfig +++ b/src/northbridge/intel/i440lx/Kconfig @@ -19,4 +19,5 @@ config NORTHBRIDGE_INTEL_I440LX bool + select HAVE_DEBUG_RAM_SETUP diff --git a/src/northbridge/intel/i440lx/raminit.c b/src/northbridge/intel/i440lx/raminit.c index d8cebb2..dcb2273 100644 --- a/src/northbridge/intel/i440lx/raminit.c +++ b/src/northbridge/intel/i440lx/raminit.c @@ -31,7 +31,7 @@ Macros and definitions. /* Uncomment this to enable debugging output. */ /* Debugging macros. */ -#if defined(DEBUG_RAM_SETUP) +#if CONFIG_DEBUG_RAM_SETUP #define PRINT_DEBUG(x) print_debug(x) #define PRINT_DEBUG_HEX8(x) print_debug_hex8(x) #define PRINT_DEBUG_HEX16(x) print_debug_hex16(x) @@ -215,7 +215,7 @@ static void northbridge_init(void) reg32 &= 0xe8000000U; pci_write_config32(NB, APBASE, reg32); - #ifdef DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP /* * apbase dont get set still, no idea what i have doing wrong yet, * i am almost sure that somehow i set it by mistake once, but can't @@ -225,7 +225,7 @@ static void northbridge_init(void) PRINT_DEBUG("APBASE "); PRINT_DEBUG_HEX32(reg32); PRINT_DEBUG("\n"); - #endif +#endif } @@ -265,7 +265,7 @@ static void sdram_set_registers(void) * i am not sure if that is needed, but was usefull * for me to confirm what got written */ -#ifdef DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP PRINT_DEBUG(" Set register 0x"); PRINT_DEBUG_HEX8(register_values[i]); PRINT_DEBUG(" to 0x"); diff --git a/src/northbridge/via/vt8601/Kconfig b/src/northbridge/via/vt8601/Kconfig index cb64dbc..1b20267 100644 --- a/src/northbridge/via/vt8601/Kconfig +++ b/src/northbridge/via/vt8601/Kconfig @@ -1,3 +1,4 @@ config NORTHBRIDGE_VIA_VT8601 bool + select HAVE_DEBUG_RAM_SETUP diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c index 2365b8d..f1ebbe5 100644 --- a/src/northbridge/via/vt8601/raminit.c +++ b/src/northbridge/via/vt8601/raminit.c @@ -69,7 +69,7 @@ static void dimms_write(int x) } } -#ifdef CONFIG_DEBUG_RAM_SETUP +#if CONFIG_DEBUG_RAM_SETUP static void dumpnorth(device_t north) { unsigned int r, c; |
