diff options
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig index eaf4f22..8dcc199 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig @@ -68,7 +68,7 @@ config FSP_FILE config MRC_CACHE_LOC_OVERRIDE hex default 0xfff80000 - depends on ENABLE_FAST_BOOT + depends on ENABLE_FSP_FAST_BOOT config CBFS_SIZE hex diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index 87fe5ae..60a1f7a 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -314,7 +314,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams, pFspInitParams->NvsBufferPtr = NULL; pFspRtBuffer->Common.BootMode = BOOT_WITH_FULL_CONFIGURATION; -#if IS_ENABLED(CONFIG_ENABLE_FAST_BOOT) +#if IS_ENABLED(CONFIG_ENABLE_FSP_FAST_BOOT) /* Find the fastboot cache that was saved in the ROM */ pFspInitParams->NvsBufferPtr = find_and_set_fastboot_cache(); #endif |
