diff options
| -rw-r--r-- | src/arch/i386/include/stdint.h | 4 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/init_cpus.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_fxx/processor_name.c | 2 | ||||
| -rw-r--r-- | src/cpu/x86/32bit/entry32.inc | 4 | ||||
| -rw-r--r-- | src/cpu/x86/mtrr/earlymtrr.c | 1 | ||||
| -rw-r--r-- | src/cpu/x86/mtrr/mtrr.c | 18 |
6 files changed, 24 insertions, 7 deletions
diff --git a/src/arch/i386/include/stdint.h b/src/arch/i386/include/stdint.h index 76bd89a..d117fc4 100644 --- a/src/arch/i386/include/stdint.h +++ b/src/arch/i386/include/stdint.h @@ -67,5 +67,9 @@ typedef unsigned long int uintmax_t; #undef __HAVE_LONG_LONG__ +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; + #endif /* I386_STDINT_H */ diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index d410013..e341b97 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -356,7 +356,6 @@ static unsigned init_cpus(unsigned cpu_init_detectedx) return bsp_apicid; } -#if CONFIG_LOGICAL_CPUS == 1 static unsigned is_core0_started(unsigned nodeid) { @@ -383,4 +382,3 @@ static void wait_all_core0_started(void) } -#endif diff --git a/src/cpu/amd/model_fxx/processor_name.c b/src/cpu/amd/model_fxx/processor_name.c index c18db57..6bbc353 100644 --- a/src/cpu/amd/model_fxx/processor_name.c +++ b/src/cpu/amd/model_fxx/processor_name.c @@ -20,8 +20,6 @@ #include <string.h> #include <cpu/x86/msr.h> -typedef unsigned int u32; - /* The maximum length of CPU names is 48 bytes, including the final NULL byte. * If you change these names your BIOS will _NOT_ pass the AMD validation and * your mainboard will not be posted on the AMD Recommended Motherboard Website diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc index 724aed3..1c18a50 100644 --- a/src/cpu/x86/32bit/entry32.inc +++ b/src/cpu/x86/32bit/entry32.inc @@ -19,11 +19,11 @@ gdtptr: /* selgdt 0x08, flat code segment */ .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 + .byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for limit */ /* selgdt 0x10,flat data segment */ .word 0xffff, 0x0000 - .byte 0x00, 0x93, 0xcf, 0x00 + .byte 0x00, 0x93, 0xcf, 0x00 gdt_end: diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 1c00bd7..d035efe 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -42,6 +42,7 @@ static void set_var_mtrr( { /* Bit Bit 32-35 of MTRRphysMask should be set to 1 */ + /* FIXME: It only support 4G less range */ msr_t basem, maskm; basem.lo = base | type; basem.hi = 0; diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 101d11d..9f6a9be 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -282,10 +282,16 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc } +#ifndef CONFIG_VAR_MTRR_HOLE +#define CONFIG_VAR_MTRR_HOLE 1 +#endif + struct var_mtrr_state { unsigned long range_startk, range_sizek; unsigned int reg; +#if CONFIG_VAR_MTRR_HOLE unsigned long hole_startk, hole_sizek; +#endif unsigned address_bits; }; @@ -308,6 +314,7 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) } /* Write the range mtrrs */ if (state->range_sizek != 0) { +#if CONFIG_VAR_MTRR_HOLE if (state->hole_sizek == 0) { /* We need to put that on to hole */ unsigned long endk = basek + sizek; @@ -316,17 +323,22 @@ void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) state->range_sizek = endk - state->range_startk; return; } +#endif state->reg = range_to_mtrr(state->reg, state->range_startk, state->range_sizek, basek, MTRR_TYPE_WRBACK, state->address_bits); +#if CONFIG_VAR_MTRR_HOLE state->reg = range_to_mtrr(state->reg, state->hole_startk, state->hole_sizek, basek, MTRR_TYPE_UNCACHEABLE, state->address_bits); +#endif state->range_startk = 0; state->range_sizek = 0; +#if CONFIG_VAR_MTRR_HOLE state->hole_startk = 0; state->hole_sizek = 0; +#endif } /* Allocate an msr */ - printk_spew(" Allocate an msr - basek = %d, sizek = %d,\n", basek, sizek); + printk_spew(" Allocate an msr - basek = %08x, sizek = %08x,\n", basek, sizek); state->range_startk = basek; state->range_sizek = sizek; } @@ -377,8 +389,10 @@ void x86_setup_var_mtrrs(unsigned address_bits) */ var_state.range_startk = 0; var_state.range_sizek = 0; +#if CONFIG_VAR_MTRR_HOLE var_state.hole_startk = 0; var_state.hole_sizek = 0; +#endif var_state.reg = 0; var_state.address_bits = address_bits; search_global_resources( @@ -388,8 +402,10 @@ void x86_setup_var_mtrrs(unsigned address_bits) /* Write the last range */ var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, var_state.range_sizek, 0, MTRR_TYPE_WRBACK, var_state.address_bits); +#if CONFIG_VAR_MTRR_HOLE var_state.reg = range_to_mtrr(var_state.reg, var_state.hole_startk, var_state.hole_sizek, 0, MTRR_TYPE_UNCACHEABLE, var_state.address_bits); +#endif printk_debug("DONE variable MTRRs\n"); printk_debug("Clear out the extra MTRR's\n"); /* Clear out the extra MTRR's */ |
