diff options
-rw-r--r-- | src/mainboard/amd/serengeti_cheetah/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/arima/hdama/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/hp/dl145_g1/romstage.c | 10 | ||||
-rw-r--r-- | src/mainboard/ibm/e325/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/ibm/e326/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8_htx/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8s2/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/iwill/dk8x/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/newisys/khepri/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2850/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2875/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2880/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2881/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2882/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s2885/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s4880/romstage.c | 9 | ||||
-rw-r--r-- | src/mainboard/tyan/s4882/romstage.c | 9 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/Kconfig | 4 | ||||
-rw-r--r-- | src/northbridge/amd/amdk8/bootblock.c | 8 |
19 files changed, 12 insertions, 154 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 5f3cd7b..8378ca4 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -9,7 +9,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> @@ -17,7 +16,6 @@ #include <reset.h> #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "cpu/x86/bist.h" #include "lib/delay.c" @@ -85,7 +83,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" -#include "northbridge/amd/amdk8/early_ht.c" #define RC0 ((1<<0)<<8) #define RC1 ((1<<1)<<8) @@ -121,12 +118,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) struct cpuid_result cpuid1; #endif - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c index 61b685c..c334fa5 100644 --- a/src/mainboard/arima/hdama/romstage.c +++ b/src/mainboard/arima/hdama/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> @@ -13,7 +12,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87360/early_serial.c" @@ -66,7 +64,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -83,12 +80,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index c3d2854..f51b4c4 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> @@ -13,13 +12,11 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" -#include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/amd/amd8111/early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -88,7 +85,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <spd.h> #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" #define RC0 ((1<<1)<<8) // Not sure about these values #define RC1 ((1<<2)<<8) // Not sure about these values @@ -110,12 +106,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c index 6dd291e..5208790 100644 --- a/src/mainboard/ibm/e325/romstage.c +++ b/src/mainboard/ibm/e325/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -14,7 +13,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87366/early_serial.c" @@ -63,7 +61,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -92,12 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c index 2c2b611..0cb0cce 100644 --- a/src/mainboard/ibm/e326/romstage.c +++ b/src/mainboard/ibm/e326/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -14,7 +13,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/nsc/pc87366/early_serial.c" @@ -63,7 +61,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -92,12 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index fc8f94b..5a24447 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -9,14 +9,12 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "cpu/x86/bist.h" #include "lib/delay.c" @@ -73,7 +71,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -91,12 +88,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; unsigned bsp_apicid = 0; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index f95c69c..4125c66 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -9,14 +9,12 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "cpu/x86/bist.h" #include "lib/delay.c" @@ -73,7 +71,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -92,12 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; unsigned bsp_apicid = 0; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index 9cf8e9c..765114c 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -9,14 +9,12 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <cpu/amd/model_fxx_rev.h> #include "southbridge/amd/amd8111/early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "cpu/x86/bist.h" #include "lib/delay.c" @@ -73,7 +71,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -92,12 +89,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; unsigned bsp_apicid = 0; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index c20d9fd..83acd52 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -10,7 +10,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <lib.h> @@ -21,7 +20,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -69,7 +67,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -86,12 +83,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index c87fcb5..e990f4e 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -16,7 +15,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -59,7 +57,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -77,12 +74,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index 435b90e..832255c 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -16,7 +15,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -59,7 +57,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -88,12 +85,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index a394826..6bdb3d0 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -16,7 +15,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -59,7 +57,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -88,12 +85,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index 3e2426d..bba4c7e 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <lib.h> @@ -15,7 +14,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -58,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -75,12 +72,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index a394826..6bdb3d0 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -16,7 +15,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -59,7 +57,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -88,12 +85,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index 41743ae..d6552ac 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <lib.h> @@ -15,7 +14,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -58,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { @@ -75,12 +72,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c index 892834b..9348f39 100644 --- a/src/mainboard/tyan/s4880/romstage.c +++ b/src/mainboard/tyan/s4880/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <stdlib.h> #include <pc80/mc146818rtc.h> #include <console/console.h> @@ -15,7 +14,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -78,7 +76,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <spd.h> #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" #define RC0 ((1<<2)<<8) #define RC1 ((1<<1)<<8) @@ -135,12 +132,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) int needs_reset; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) init_cpus(cpu_init_detectedx); diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index 2aa4ee5..c916e4c 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -4,7 +4,6 @@ #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> -#include <cpu/x86/lapic.h> #include <pc80/mc146818rtc.h> #include <console/console.h> #include <lib.h> @@ -14,7 +13,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/early_serial.c" @@ -86,7 +84,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <spd.h> #include "cpu/amd/car/post_cache_as_ram.c" #include "cpu/amd/model_fxx/init_cpus.c" -#include "northbridge/amd/amdk8/early_ht.c" #define RC0 ((1<<2)<<8) #define RC1 ((1<<1)<<8) @@ -114,12 +111,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - if (!cpu_init_detectedx && boot_cpu()) { - /* Nothing special needs to be done to find bus 0 */ - /* Allow the HT devices to be found */ - enumerate_ht_chain(); - } - if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 418c734..858041a 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -45,6 +45,10 @@ config HW_MEM_HOLE_SIZE_AUTO_INC bool default n +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/amd/amdk8/bootblock.c" + config SB_HT_CHAIN_UNITID_OFFSET_ONLY bool default n diff --git a/src/northbridge/amd/amdk8/bootblock.c b/src/northbridge/amd/amdk8/bootblock.c new file mode 100644 index 0000000..b5395bb --- /dev/null +++ b/src/northbridge/amd/amdk8/bootblock.c @@ -0,0 +1,8 @@ +#include <arch/io.h> +#include <arch/romcc_io.h> +#include <device/pci_def.h> +#include "northbridge/amd/amdk8/early_ht.c" + +static void bootblock_northbridge_init(void) { + enumerate_ht_chain(); +} |