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authorStefan Tauner <stefan.tauner@gmx.at>2012-09-06 10:38:49 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-09-06 19:51:05 +0200
commite54995a11653344e2e1d0cdbaff2bb65131a4c48 (patch)
treebd59f5318732923b3b68b61dc066b24dbc104928 /util/superiotool
parente644bada0262b36605fdb992f449deece0ca0f9d (diff)
downloadcoreboot-staging-e54995a11653344e2e1d0cdbaff2bb65131a4c48.zip
coreboot-staging-e54995a11653344e2e1d0cdbaff2bb65131a4c48.tar.gz
superiotool: Add support for Fintek F81865F/F-I register dump.
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf The code was done by Juha Tuomala <Juha.Tuomala@iki.fi> but he refused to sign it off, or commit it for review. I'll commit it anyway with my sign-off because it does not exceed threshold of originality for any copyright. Change-Id: Id86267f5add539b99229f20bbe339bfb5eb20f8b Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/1496 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'util/superiotool')
-rw-r--r--util/superiotool/fintek.c48
1 files changed, 48 insertions, 0 deletions
diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c
index fc1d3f2..f5a01de 100644
--- a/util/superiotool/fintek.c
+++ b/util/superiotool/fintek.c
@@ -279,6 +279,54 @@ static const struct superio_registers reg_table[] = {
{0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
{EOT}}},
{0x0407, "F81865F/F-I", {
+ {NOLDN, NULL,
+ {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a-1,0x2a-2,0x2b,0x2c,0x2d,EOT},
+ {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
+ {0x00, "FDC",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
+ {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
+ {0x03, "LPT",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
+ {NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
+ {0x04, "HWMON",
+ {0x30,0x60,0x61,0x70,EOT},
+ {NANA,0x02,0x95,NANA,EOT}},
+ {0x05, "KBC",
+ {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
+ {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
+ {0x06, "GPIO",
+ {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
+ {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
+ {0x07, "WDT",
+ {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
+ {NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
+ {0x08, "SPI",
+ {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
+ {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0a, "PME & ACPI",
+ {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
+ {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
+ {0x0b, "RTC",
+ {0x30,0x60,0x61,0x70,EOT},
+ {NANA,0x00,0x00,NANA,EOT}},
+ {0x10, "UART1",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
+ {0x11, "UART2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
+ {0x12, "UART3",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
+ {0x13, "UART4",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
+ {0x14, "UART5",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
+ {0x15, "UART6",
+ {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
+ {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
{EOT}}},
{EOT}
};
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