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| author | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-10-03 13:20:26 -0700 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-10-03 22:23:24 +0000 |
| commit | fb50124d22014742b6990a95df87a7a828e891b6 (patch) | |
| tree | 2de7958eedfd8b2ce34f148af251ad6ce13930e4 /src/vendorcode | |
| parent | ecf2eb463faff04ab6061eb5dfd8da26c5026a97 (diff) | |
| download | coreboot-staging-fb50124d22014742b6990a95df87a7a828e891b6.zip coreboot-staging-fb50124d22014742b6990a95df87a7a828e891b6.tar.gz | |
Remove sandybridge and ivybridge FSP code path
We already have two other code paths for this silicon. Maintaining the
FSP path as well doesn't make much sense. There was only one board to
use this code, and it's a reference board that I doubt anyone still
owns or uses.
Change-Id: I4fcfa6c56448416624fd26418df19b354eb72f39
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11789
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/intel/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index 754c487..580089f 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -19,7 +19,6 @@ config FSP_VENDORCODE_HEADER_PATH string - default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX |
