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| author | Marc Jones <marc.jones@se-eng.com> | 2015-09-15 12:44:37 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-10 00:00:46 +0100 |
| commit | 5a4554a73f68247c4e00cb1a5d19fb504e9adb92 (patch) | |
| tree | b72910ae43f17efcdfc9320d7219f390f961374a /src/vendorcode | |
| parent | 721c407caa934ae9dd6e0fa8af0fc547e99d064c (diff) | |
| download | coreboot-staging-5a4554a73f68247c4e00cb1a5d19fb504e9adb92.zip coreboot-staging-5a4554a73f68247c4e00cb1a5d19fb504e9adb92.tar.gz | |
southbridge/intel: Add FSP based i89xx southbridge support
The Intel i89xx is a communications chipset that pairs with
Sandy(Ivy)bridge processors. It has a lot in common with
the bd82x6x chipset, but fewer devices and options.
Change-Id: I11bcd1edc80f72a1b2521def9be0d1bde5789a79
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/12166
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/intel/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index a000d99..1f9c930 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -16,6 +16,7 @@ config FSP_VENDORCODE_HEADER_PATH string default "fsp1_0/ivybridge_bd82x6x" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_BD82X6X + default "fsp1_0/ivybridge_i89xx/" if CPU_INTEL_FSP_MODEL_306AX && SOUTHBRIDGE_INTEL_FSP_I89XX default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX |
