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| author | Martin Roth <martinroth@google.com> | 2015-10-11 10:36:26 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-10-14 22:49:03 +0000 |
| commit | 58562405c8c416a415652516b8af31b204b4ff0d (patch) | |
| tree | 3311f3f5feceea80a048337f0485fc9c956ee5ac /src/vendorcode | |
| parent | 83e4c5613eecc5283d9a66997dc90e26384f9284 (diff) | |
| download | coreboot-staging-58562405c8c416a415652516b8af31b204b4ff0d.zip coreboot-staging-58562405c8c416a415652516b8af31b204b4ff0d.tar.gz | |
Revert "Remove FSP Rangeley SOC and mohonpeak board support"
This chip is still being used and should not have been deleted. It's
a current intel chip, and doesn't even require an ME binary.
This reverts commit 959478a763c16688d43752adbae2c76e7764da45.
Change-Id: I78594871f87af6e882a245077b59727e15f8021a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11860
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/intel/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/vendorcode/intel/Kconfig b/src/vendorcode/intel/Kconfig index 1d1049e..580089f 100644 --- a/src/vendorcode/intel/Kconfig +++ b/src/vendorcode/intel/Kconfig @@ -20,6 +20,7 @@ config FSP_VENDORCODE_HEADER_PATH string default "fsp1_0/baytrail" if SOC_INTEL_FSP_BAYTRAIL + default "fsp1_0/rangeley" if CPU_INTEL_FSP_MODEL_406DX config UEFI_2_4_BINDING def_bool n |
