diff options
author | Martin Roth <martinroth@google.com> | 2015-12-21 13:01:45 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2015-12-22 23:06:44 +0100 |
commit | a4c57407527d8fcd9a3e6e06824b21eb85104b78 (patch) | |
tree | c0078cb23232f5e9542461c3ec513380ddfac0ce /src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.h | |
parent | 721f2998a5d4143f7d609e79255d570b43d804a4 (diff) | |
download | coreboot-staging-a4c57407527d8fcd9a3e6e06824b21eb85104b78.zip coreboot-staging-a4c57407527d8fcd9a3e6e06824b21eb85104b78.tar.gz |
drivers/intel/fsp1_0/fsp_util.c: Fix indentation
- Also update post code comment to keep under 80 characters.
Change-Id: Id0fd0ee5660f2628fe33188855bebb6e3eea8d2e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12780
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Proc/Mem/Tech/DDR3/mtot3.h')
0 files changed, 0 insertions, 0 deletions