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author | Stefan Reinauer <stepan@coresystems.de> | 2009-05-02 12:42:30 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2009-05-02 12:42:30 +0000 |
commit | 88e71e88597d939972267cdb00aca3cc61f5e171 (patch) | |
tree | 5a8f5d5d736ea3c4222484ba94f357afc1732816 /src/southbridge | |
parent | a0dbddff17986266da3342cbfb3b8194588664d0 (diff) | |
download | coreboot-staging-88e71e88597d939972267cdb00aca3cc61f5e171.zip coreboot-staging-88e71e88597d939972267cdb00aca3cc61f5e171.tar.gz |
Run dos2unix on all files:
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/i82801ca/i82801ca_pci.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/src/southbridge/intel/i82801ca/i82801ca_pci.c b/src/southbridge/intel/i82801ca/i82801ca_pci.c index 2508419..5f7b897 100644 --- a/src/southbridge/intel/i82801ca/i82801ca_pci.c +++ b/src/southbridge/intel/i82801ca/i82801ca_pci.c @@ -1,30 +1,30 @@ -#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include "i82801ca.h"
-
-static void pci_init(struct device *dev)
-{
- // NOTE: the original (v1) 'CA code set these in the bridge register (0x3E-3F)
- /* Enable pci error detecting */
- uint32_t dword = pci_read_config32(dev, PCI_COMMAND);
- dword |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
- pci_write_config32(dev, PCI_COMMAND, dword);
-}
-
-static struct device_operations pci_ops = {
- .read_resources = pci_bus_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_bus_enable_resources,
- .init = pci_init,
- .scan_bus = pci_scan_bridge,
-};
-
-static const struct pci_driver pci_driver __pci_driver = {
- .ops = &pci_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .device = PCI_DEVICE_ID_INTEL_82801CA_PCI,
-};
-
+#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <device/pci_ops.h> +#include "i82801ca.h" + +static void pci_init(struct device *dev) +{ + // NOTE: the original (v1) 'CA code set these in the bridge register (0x3E-3F) + /* Enable pci error detecting */ + uint32_t dword = pci_read_config32(dev, PCI_COMMAND); + dword |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY); + pci_write_config32(dev, PCI_COMMAND, dword); +} + +static struct device_operations pci_ops = { + .read_resources = pci_bus_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_bus_enable_resources, + .init = pci_init, + .scan_bus = pci_scan_bridge, +}; + +static const struct pci_driver pci_driver __pci_driver = { + .ops = &pci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = PCI_DEVICE_ID_INTEL_82801CA_PCI, +}; + |