diff options
author | Myles Watson <mylesgw@gmail.com> | 2009-02-12 21:30:06 +0000 |
---|---|---|
committer | Myles Watson <mylesgw@gmail.com> | 2009-02-12 21:30:06 +0000 |
commit | 552b327ca39f12b21a9e1a8dfdb71f3f26abf256 (patch) | |
tree | 6b47a55381e7cbe3c58afec9db4612d32fc5dfd3 /src/southbridge | |
parent | 7f86ed122068f34de4e8723b83e0d9b053cea9a2 (diff) | |
download | coreboot-staging-552b327ca39f12b21a9e1a8dfdb71f3f26abf256.zip coreboot-staging-552b327ca39f12b21a9e1a8dfdb71f3f26abf256.tar.gz |
This patch converts __FUNCTION__ to __func__, since __func__ is standard.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/cs5535/cs5535.c | 6 | ||||
-rw-r--r-- | src/southbridge/amd/cs5535/cs5535_ide.c | 4 | ||||
-rw-r--r-- | src/southbridge/amd/cs5536/cs5536.c | 8 | ||||
-rw-r--r-- | src/southbridge/amd/cs5536/cs5536_ide.c | 4 | ||||
-rw-r--r-- | src/southbridge/via/vt8231/vt8231_ide.c | 2 | ||||
-rw-r--r-- | src/southbridge/via/vt8231/vt8231_lpc.c | 4 | ||||
-rw-r--r-- | src/southbridge/via/vt8235/vt8235_ide.c | 2 | ||||
-rw-r--r-- | src/southbridge/via/vt8235/vt8235_lpc.c | 4 |
8 files changed, 17 insertions, 17 deletions
diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c index e56e199..d1ec056 100644 --- a/src/southbridge/amd/cs5535/cs5535.c +++ b/src/southbridge/amd/cs5535/cs5535.c @@ -46,7 +46,7 @@ static void nvram_on(struct device *dev) static void southbridge_init(struct device *dev) { - printk_spew("cs5535: %s\n", __FUNCTION__); + printk_spew("cs5535: %s\n", __func__); nvram_on(dev); } @@ -66,12 +66,12 @@ static void dump_south(struct device *dev) static void southbridge_enable(struct device *dev) { - printk_spew("%s: dev is %p\n", __FUNCTION__, dev); + printk_spew("%s: dev is %p\n", __func__, dev); } static void cs5535_pci_dev_enable_resources(device_t dev) { - printk_spew("cs5535.c: %s()\n", __FUNCTION__); + printk_spew("cs5535.c: %s()\n", __func__); pci_dev_enable_resources(dev); enable_childrens_resources(dev); } diff --git a/src/southbridge/amd/cs5535/cs5535_ide.c b/src/southbridge/amd/cs5535/cs5535_ide.c index b639726..3090167 100644 --- a/src/southbridge/amd/cs5535/cs5535_ide.c +++ b/src/southbridge/amd/cs5535/cs5535_ide.c @@ -7,12 +7,12 @@ static void ide_init(struct device *dev) { - printk_spew("cs5535_ide: %s\n", __FUNCTION__); + printk_spew("cs5535_ide: %s\n", __func__); } static void ide_enable(struct device *dev) { - printk_spew("cs5535_ide: %s\n", __FUNCTION__); + printk_spew("cs5535_ide: %s\n", __func__); } static struct device_operations ide_ops = { diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c index 0acc5ca..e9dc868 100644 --- a/src/southbridge/amd/cs5536/cs5536.c +++ b/src/southbridge/amd/cs5536/cs5536.c @@ -579,7 +579,7 @@ static void southbridge_init(struct device *dev) * unsigned short gpiobase = MDD_GPIO; */ - printk_err("cs5536: %s\n", __FUNCTION__); + printk_err("cs5536: %s\n", __func__); setup_i8259(); lpc_init(sb); uarts_init(sb); @@ -591,7 +591,7 @@ static void southbridge_init(struct device *dev) (sb->enable_gpio_int_route >> 16)); } - printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __FUNCTION__, + printk_err("cs5536: %s: enable_ide_nand_flash is %d\n", __func__, sb->enable_ide_nand_flash); if (sb->enable_ide_nand_flash == 1) { enable_ide_nand_flash_header(); @@ -610,13 +610,13 @@ static void southbridge_init(struct device *dev) static void southbridge_enable(struct device *dev) { - printk_err("cs5536: %s: dev is %p\n", __FUNCTION__, dev); + printk_err("cs5536: %s: dev is %p\n", __func__, dev); } static void cs5536_pci_dev_enable_resources(device_t dev) { - printk_err("cs5536: %s()\n", __FUNCTION__); + printk_err("cs5536: %s()\n", __func__); pci_dev_enable_resources(dev); enable_childrens_resources(dev); } diff --git a/src/southbridge/amd/cs5536/cs5536_ide.c b/src/southbridge/amd/cs5536/cs5536_ide.c index b0d711c..bbb6bb5 100644 --- a/src/southbridge/amd/cs5536/cs5536_ide.c +++ b/src/southbridge/amd/cs5536/cs5536_ide.c @@ -36,7 +36,7 @@ static void ide_init(struct device *dev) { uint32_t ide_cfg; - printk_spew("cs5536_ide: %s\n", __FUNCTION__); + printk_spew("cs5536_ide: %s\n", __func__); /* GPIO and IRQ setup are handled in the main chipset code. */ // Enable the channel and Post Write Buffer @@ -49,7 +49,7 @@ static void ide_init(struct device *dev) static void ide_enable(struct device *dev) { - printk_spew("cs5536_ide: %s\n", __FUNCTION__); + printk_spew("cs5536_ide: %s\n", __func__); } diff --git a/src/southbridge/via/vt8231/vt8231_ide.c b/src/southbridge/via/vt8231/vt8231_ide.c index dfb8c99..3cfa01e 100644 --- a/src/southbridge/via/vt8231/vt8231_ide.c +++ b/src/southbridge/via/vt8231/vt8231_ide.c @@ -20,7 +20,7 @@ static void ide_init(struct device *dev) */ /* - printk_info("%s: enabling compatibility IDE addresses\n", __FUNCTION__); + printk_info("%s: enabling compatibility IDE addresses\n", __func__); enables = pci_read_config8(dev, 0x42); printk_debug("enables in reg 0x42 0x%x\n", enables); enables &= ~0xc0; // compatability mode diff --git a/src/southbridge/via/vt8231/vt8231_lpc.c b/src/southbridge/via/vt8231/vt8231_lpc.c index 54eef96..4b90635 100644 --- a/src/southbridge/via/vt8231/vt8231_lpc.c +++ b/src/southbridge/via/vt8231/vt8231_lpc.c @@ -24,7 +24,7 @@ static const unsigned char slotIrqs[4] = { 5, 10, 12, 11 }; static void pci_routing_fixup(struct device *dev) { - printk_info("%s: dev is %p\n", __FUNCTION__, dev); + printk_info("%s: dev is %p\n", __func__, dev); if (dev) { /* initialize PCI interupts - these assignments depend on the PCB routing of PINTA-D @@ -50,7 +50,7 @@ static void pci_routing_fixup(struct device *dev) // PCI slot printk_info("setting pci slot\n"); pci_assign_irqs(0, 0x14, slotIrqs); - printk_info("%s: DONE\n", __FUNCTION__); + printk_info("%s: DONE\n", __func__); } static void vt8231_init(struct device *dev) diff --git a/src/southbridge/via/vt8235/vt8235_ide.c b/src/southbridge/via/vt8235/vt8235_ide.c index 5f7a85f..47d1b05 100644 --- a/src/southbridge/via/vt8235/vt8235_ide.c +++ b/src/southbridge/via/vt8235/vt8235_ide.c @@ -20,7 +20,7 @@ static void ide_init(struct device *dev) * reason. */ printk_info("%s: enabling compatibility IDE addresses\n", - __FUNCTION__); + __func__); enables = pci_read_config8(dev, 0x42); printk_debug("enables in reg 0x42 0x%x\n", enables); enables &= ~0xc0; // compatability mode diff --git a/src/southbridge/via/vt8235/vt8235_lpc.c b/src/southbridge/via/vt8235/vt8235_lpc.c index 9c18891..521271d 100644 --- a/src/southbridge/via/vt8235/vt8235_lpc.c +++ b/src/southbridge/via/vt8235/vt8235_lpc.c @@ -57,7 +57,7 @@ static unsigned char *pin_to_irq(const unsigned char *pin) static void pci_routing_fixup(struct device *dev) { - printk_info("%s: dev is %p\n", __FUNCTION__, dev); + printk_info("%s: dev is %p\n", __func__, dev); /* set up PCI IRQ routing */ pci_write_config8(dev, 0x55, pciIrqs[0] << 4); @@ -97,7 +97,7 @@ static void pci_routing_fixup(struct device *dev) printk_info("setting riser slot\n"); pci_assign_irqs(0, 0x13, pin_to_irq(riserPins)); - printk_spew("%s: DONE\n", __FUNCTION__); + printk_spew("%s: DONE\n", __func__); } /* |