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authorStefan Reinauer <stefan.reinauer@coreboot.org>2013-02-27 23:45:20 +0100
committerRonald G. Minnich <rminnich@gmail.com>2013-02-28 00:00:30 +0100
commitfd611f9c2c8c751069c6cd1634a3e3e523ff098b (patch)
tree3e1d3d844987a6f02d406e13f68aa37e3f55ec7e /src/northbridge/intel
parent9c29cfae8cc6214478a0a555e6901779eb19ef54 (diff)
downloadcoreboot-staging-fd611f9c2c8c751069c6cd1634a3e3e523ff098b.zip
coreboot-staging-fd611f9c2c8c751069c6cd1634a3e3e523ff098b.tar.gz
Drop CONFIG_WRITE_HIGH_TABLES
It's been on for all boards per default since several years now and the old code path probably doesn't even work anymore. Let's just have one consistent way of doing things. Change-Id: I58da7fe9b89a648d9a7165d37e0e35c88c06ac7e Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2547 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/e7501/northbridge.c5
-rw-r--r--src/northbridge/intel/e7505/northbridge.c5
-rw-r--r--src/northbridge/intel/e7520/northbridge.c11
-rw-r--r--src/northbridge/intel/e7525/northbridge.c10
-rw-r--r--src/northbridge/intel/gm45/northbridge.c2
-rw-r--r--src/northbridge/intel/i3100/northbridge.c6
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c7
-rw-r--r--src/northbridge/intel/i440lx/northbridge.c10
-rw-r--r--src/northbridge/intel/i5000/northbridge.c5
-rw-r--r--src/northbridge/intel/i82810/northbridge.c8
-rw-r--r--src/northbridge/intel/i82830/northbridge.c6
-rw-r--r--src/northbridge/intel/i855/northbridge.c6
-rw-r--r--src/northbridge/intel/i945/northbridge.c7
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c2
-rw-r--r--src/northbridge/intel/sch/northbridge.c7
15 files changed, 12 insertions, 85 deletions
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index ab382fa..d30c9df 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -6,10 +6,7 @@
#include <cpu/cpu.h>
#include <stdlib.h>
#include <string.h>
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -87,11 +84,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 1b6f40d..6ee371f 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -7,10 +7,7 @@
#include <stdlib.h>
#include <string.h>
#include "e7505.h"
-
-#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -88,11 +85,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index 03aad3e..96fcc35 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -7,18 +7,14 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "northbridge.h"
#include "e7520.h"
-
static unsigned int max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -26,9 +22,8 @@ static void pci_domain_set_resources(device_t dev)
pci_tolm = find_pci_tolm(dev->link_list);
-#if 1
printk(BIOS_DEBUG, "PCI mem marker = %x\n", pci_tolm);
-#endif
+
/* FIXME Me temporary hack */
if(pci_tolm > 0xe0000000)
pci_tolm = 0xe0000000;
@@ -107,11 +102,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 12ee971..83757bd 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -7,18 +7,14 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "northbridge.h"
#include "e7525.h"
-
static unsigned int max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -26,9 +22,7 @@ static void pci_domain_set_resources(device_t dev)
pci_tolm = find_pci_tolm(dev->link_list);
-#if 1
printk(BIOS_DEBUG, "PCI mem marker = %x\n", pci_tolm);
-#endif
/* FIXME Me temporary hack */
if(pci_tolm > 0xe0000000)
pci_tolm = 0xe0000000;
@@ -107,11 +101,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 9c1e96d..c7aa3fa 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -166,11 +166,9 @@ static void mch_domain_read_resources(device_t dev)
pcie_config_size >> 10, IORESOURCE_RESERVE);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk << 10) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
static void mch_domain_set_resources(device_t dev)
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 87c5e75..3e62ae4 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -29,6 +29,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "chip.h"
#include "i3100.h"
@@ -36,9 +37,6 @@
static u32 max_bus;
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
@@ -128,11 +126,9 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 488275d..2ab62a9 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -6,6 +6,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
#include "northbridge.h"
@@ -31,10 +32,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x7190,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void i440bx_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -70,11 +67,9 @@ static void i440bx_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i440lx/northbridge.c b/src/northbridge/intel/i440lx/northbridge.c
index bbb621e..623071f 100644
--- a/src/northbridge/intel/i440lx/northbridge.c
+++ b/src/northbridge/intel/i440lx/northbridge.c
@@ -27,6 +27,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <pc80/keyboard.h>
#include "northbridge.h"
@@ -37,9 +38,6 @@
* Maciej
*/
-/* TODO:
- * - maybe this could print Northbridge i440LX Init?
- */
static void northbridge_init(device_t dev)
{
printk(BIOS_SPEW, "Northbridge Init\n");
@@ -60,10 +58,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x7180,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void i440lx_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -99,11 +93,9 @@ static void i440lx_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 0, 640);
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i5000/northbridge.c b/src/northbridge/intel/i5000/northbridge.c
index c9b99a9..cd1abc8 100644
--- a/src/northbridge/intel/i5000/northbridge.c
+++ b/src/northbridge/intel/i5000/northbridge.c
@@ -28,9 +28,6 @@
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include <cbmem.h>
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
@@ -114,12 +111,10 @@ static void mc_read_resources(device_t dev)
resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = tolm - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
printk(BIOS_DEBUG, "high_tables_base: %08llx, size %lld\n", high_tables_base, high_tables_size);
-#endif
}
static struct pci_operations intel_pci_ops = {
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index 07dc47b..259a9f5 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -27,6 +27,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include "northbridge.h"
#include "i82810.h"
@@ -68,10 +69,6 @@ static int translate_i82810_to_mb[] = {
/* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -124,11 +121,10 @@ static void pci_domain_set_resources(device_t dev)
ram_resource(dev, idx++, 768, tomk - 768);
uma_resource(dev, idx++, uma_memory_base >> 10, uma_memory_size >> 10);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
+
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 8920fe7..8ee1880 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -24,6 +24,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <stdlib.h>
#include <string.h>
@@ -49,9 +50,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x3575,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -92,11 +90,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
static struct device_operations pci_domain_ops = {
diff --git a/src/northbridge/intel/i855/northbridge.c b/src/northbridge/intel/i855/northbridge.c
index 2ff58fd..e3a3844 100644
--- a/src/northbridge/intel/i855/northbridge.c
+++ b/src/northbridge/intel/i855/northbridge.c
@@ -28,6 +28,7 @@
#include <device/pci_ids.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/x86/cache.h>
#include <cpu/cpu.h>
@@ -51,9 +52,6 @@ static const struct pci_driver northbridge_driver __pci_driver = {
.device = 0x3580,
};
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
@@ -107,11 +105,9 @@ static void pci_domain_set_resources(device_t dev)
/* ram_resource(dev, idx++, 1024, tolmk - 1024); */
ram_resource(dev, idx++, 768, tolmk - 768);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 63a03ad..bf3bbcb 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -26,6 +26,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include "i945.h"
@@ -80,10 +81,6 @@ static void add_fixed_resources(struct device *dev, int index)
}
}
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
uint32_t pci_tolm;
@@ -173,11 +170,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk_stolen * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/* TODO We could determine how many PCIe busses we need in
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 4b6808a..bc63d1a 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -259,11 +259,9 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/* TODO We could determine how many PCIe busses we need in
diff --git a/src/northbridge/intel/sch/northbridge.c b/src/northbridge/intel/sch/northbridge.c
index ffeb0ed..3a71da2 100644
--- a/src/northbridge/intel/sch/northbridge.c
+++ b/src/northbridge/intel/sch/northbridge.c
@@ -26,6 +26,7 @@
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
+#include <cbmem.h>
#include <cpu/cpu.h>
#include <arch/acpi.h>
#include "sch.h"
@@ -92,10 +93,6 @@ static void add_fixed_resources(struct device *dev, int index)
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
}
-#if CONFIG_WRITE_HIGH_TABLES
-#include <cbmem.h>
-#endif
-
static void pci_domain_set_resources(device_t dev)
{
u32 pci_tolm;
@@ -185,13 +182,11 @@ static void pci_domain_set_resources(device_t dev)
assign_resources(dev->link_list);
-#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables. */
high_tables_base = tomk * 1024 - HIGH_MEMORY_SIZE;
high_tables_base -= uma_memory_size;
high_tables_base -= tseg_memory_base;
high_tables_size = HIGH_MEMORY_SIZE;
-#endif
}
/*
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