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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-10-11 02:05:55 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-10-11 10:07:17 +0000 |
| commit | c48f5ef3cc623a4b1bccdbc9cb3e1d15505b7ad4 (patch) | |
| tree | 603ac8b84117bed7b51ea05dcd627b23d6801473 /src/northbridge/intel | |
| parent | 551cff08d540ced6817cfe230750a311d573c209 (diff) | |
| download | coreboot-staging-c48f5ef3cc623a4b1bccdbc9cb3e1d15505b7ad4.zip coreboot-staging-c48f5ef3cc623a4b1bccdbc9cb3e1d15505b7ad4.tar.gz | |
Kill lvds_num_lanes
Only one value would work with corresponding gma code currently (which one
depends on board). Going forward, it's possible to compute which number can
be used, so there is no need to keep this info around.
Change-Id: Iadc77ef94b02f892860e3ae8d70a0a792758565d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11862
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/gm45/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 33eae84..3dd051c 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -244,7 +244,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency; data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock) - / (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4)); + / (link_frequency * 8 * 4); printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", hactive, vactive); diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index ed993f1..c4e7731 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -792,7 +792,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info, link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency; data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock) - / (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4)); + / (link_frequency * 8 * 4); printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", hactive, vactive); diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index 7cb71f3..c37959e 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -313,7 +313,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, link_m1 = ((uint64_t)link_n1 * edid.mode.pixel_clock) / link_frequency; data_m1 = ((uint64_t)data_n1 * 18 * edid.mode.pixel_clock) - / (link_frequency * 8 * (info->lvds_num_lanes ? : 1)); + / (link_frequency * 8); printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", hactive, vactive); diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index 9b2f1f2..cd48174 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -276,7 +276,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency; data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock) - / (link_frequency * 8 * (info->lvds_num_lanes ? : 4)); + / (link_frequency * 8 * 4); printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", hactive, vactive); |
