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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-01 12:52:52 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-10-01 12:52:52 +0000 |
commit | 2ee6779a64922af755a35ce70f85f2d67b488557 (patch) | |
tree | 4ae6d7310d71fa29baab3e937cfcd9bb408db5a6 /src/northbridge/intel | |
parent | dc65196f8f18c28085d40ccbeb45bba3bfe28294 (diff) | |
download | coreboot-staging-2ee6779a64922af755a35ce70f85f2d67b488557.zip coreboot-staging-2ee6779a64922af755a35ce70f85f2d67b488557.tar.gz |
The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
code to use it. That makes the code more readable and also less
error-prone.
Abuild tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r-- | src/northbridge/intel/e7501/raminit.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/e7520/raminit.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/e7520/raminit_test.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/e7525/raminit.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/e7525/raminit_test.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/i3100/raminit.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/i440bx/raminit.c | 3 | ||||
-rw-r--r-- | src/northbridge/intel/i855pm/raminit.c | 2 |
8 files changed, 15 insertions, 8 deletions
diff --git a/src/northbridge/intel/e7501/raminit.c b/src/northbridge/intel/e7501/raminit.c index 1aeb4f0..4695915 100644 --- a/src/northbridge/intel/e7501/raminit.c +++ b/src/northbridge/intel/e7501/raminit.c @@ -14,6 +14,7 @@ #include <assert.h> #include <spd.h> #include <sdram_mode.h> +#include <stdlib.h> #include "e7501.h" // Uncomment this to enable run-time checking of DIMM parameters @@ -1631,7 +1632,7 @@ static void RAM_RESET_DDR_PTR(const struct mem_controller *ctrl) static void ram_set_d0f0_regs(const struct mem_controller *ctrl) { int i; - int num_values = sizeof(constant_register_values)/sizeof(constant_register_values[0]); + int num_values = ARRAY_SIZE(constant_register_values); ASSERT((num_values % 3) == 0); // Bad table? diff --git a/src/northbridge/intel/e7520/raminit.c b/src/northbridge/intel/e7520/raminit.c index 672a117..27ed477 100644 --- a/src/northbridge/intel/e7520/raminit.c +++ b/src/northbridge/intel/e7520/raminit.c @@ -21,6 +21,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "e7520.h" @@ -62,7 +63,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) int i; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where; diff --git a/src/northbridge/intel/e7520/raminit_test.c b/src/northbridge/intel/e7520/raminit_test.c index a69bafd..4716a29 100644 --- a/src/northbridge/intel/e7520/raminit_test.c +++ b/src/northbridge/intel/e7520/raminit_test.c @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "e7520.h" jmp_buf end_buf; @@ -341,7 +342,7 @@ static void raminit_main(void) }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); } diff --git a/src/northbridge/intel/e7525/raminit.c b/src/northbridge/intel/e7525/raminit.c index 5b2d1dc..313dc0f 100644 --- a/src/northbridge/intel/e7525/raminit.c +++ b/src/northbridge/intel/e7525/raminit.c @@ -21,6 +21,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "e7525.h" @@ -62,7 +63,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) int i; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; unsigned where; diff --git a/src/northbridge/intel/e7525/raminit_test.c b/src/northbridge/intel/e7525/raminit_test.c index 2d44d25..0fdb584 100644 --- a/src/northbridge/intel/e7525/raminit_test.c +++ b/src/northbridge/intel/e7525/raminit_test.c @@ -4,6 +4,7 @@ #include <string.h> #include <setjmp.h> #include <device/pci_def.h> +#include <stdlib.h> #include "e7525.h" jmp_buf end_buf; @@ -313,7 +314,7 @@ static void raminit_main(void) }; console_init(); memreset_setup(); - sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu); + sdram_initialize(ARRAY_SIZE(cpu), cpu); } #endif diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c index f6ddecb..af0f5d5 100644 --- a/src/northbridge/intel/i3100/raminit.c +++ b/src/northbridge/intel/i3100/raminit.c @@ -22,6 +22,7 @@ #include <cpu/x86/mem.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/cache.h> +#include <stdlib.h> #include "raminit.h" #include "i3100.h" @@ -64,7 +65,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) int i; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { device_t dev; u32 where; diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index 38470ea..58a158c 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -21,6 +21,7 @@ #include <spd.h> #include <sdram_mode.h> #include <delay.h> +#include <stdlib.h> #include "i440bx.h" /*----------------------------------------------------------------------------- @@ -430,7 +431,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl) PRINT_DEBUG("Northbridge prior to SDRAM init:\r\n"); DUMPNORTH(); - max = sizeof(register_values) / sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); /* Set registers as specified in the register_values[] array. */ for (i = 0; i < max; i += 3) { diff --git a/src/northbridge/intel/i855pm/raminit.c b/src/northbridge/intel/i855pm/raminit.c index 9a0f7c0..8e97c10 100644 --- a/src/northbridge/intel/i855pm/raminit.c +++ b/src/northbridge/intel/i855pm/raminit.c @@ -384,7 +384,7 @@ static void ram_set_d0f0_regs(const struct mem_controller *ctrl) { #endif int i; int max; - max = sizeof(register_values)/sizeof(register_values[0]); + max = ARRAY_SIZE(register_values); for(i = 0; i < max; i += 3) { uint32_t reg; #if DEBUG_RAM_CONFIG >=2 |