northbridge: Trivial - drop trailing blank lines at EOF

Change-Id: I9515778e97cc5ae0e366b888da90a651ae5994fe
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6210
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

40 files changed, 0 insertions, 52 deletions

diff --git a/src/northbridge/intel/e7505/debug.h b/src/northbridge/intel/e7505/debug.h
index a517fc0..2b060e6 100644
--- a/src/northbridge/intel/e7505/debug.h
+++ b/src/northbridge/intel/e7505/debug.h
@@ -12,4 +12,3 @@ void dump_io_resources(unsigned port);
 void dump_mem(unsigned start, unsigned end);
 
 #endif
-
diff --git a/src/northbridge/intel/e7505/e7505.h b/src/northbridge/intel/e7505/e7505.h
index 456a0a9..08b681a 100644
--- a/src/northbridge/intel/e7505/e7505.h
+++ b/src/northbridge/intel/e7505/e7505.h
@@ -82,4 +82,3 @@
 #define NERR_GLOBAL	0x44	/* Next global error register, 32 bits */
 #define DRAM_FERR	0x80	/* DRAM first error register, 8 bits */
 #define DRAM_NERR	0x82	/* DRAM next error register, 8 bits */
-
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index a63029b..8f1632d 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -142,4 +142,3 @@ struct chip_operations northbridge_intel_e7505_ops = {
 	CHIP_NAME("Intel E7505 Northbridge")
 	.enable_dev = enable_dev,
 };
-
diff --git a/src/northbridge/intel/e7520/chip.h b/src/northbridge/intel/e7520/chip.h
index 99833bd..2b9e196 100644
--- a/src/northbridge/intel/e7520/chip.h
+++ b/src/northbridge/intel/e7520/chip.h
@@ -3,4 +3,3 @@ struct northbridge_intel_e7520_config
         /* Interrupt line connect */
         unsigned int intrline;
 };
-
diff --git a/src/northbridge/intel/e7520/northbridge.h b/src/northbridge/intel/e7520/northbridge.h
index 516834f..b89b721 100644
--- a/src/northbridge/intel/e7520/northbridge.h
+++ b/src/northbridge/intel/e7520/northbridge.h
@@ -5,4 +5,3 @@ extern unsigned int e7520_scan_root_bus(device_t root, unsigned int max);
 
 
 #endif /* NORTHBRIDGE_INTEL_E7520_H */
-
diff --git a/src/northbridge/intel/e7520/pciexp_porta.c b/src/northbridge/intel/e7520/pciexp_porta.c
index ab73a71..f3639ad 100644
--- a/src/northbridge/intel/e7520/pciexp_porta.c
+++ b/src/northbridge/intel/e7520/pciexp_porta.c
@@ -58,5 +58,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };
-
-
diff --git a/src/northbridge/intel/e7520/pciexp_porta1.c b/src/northbridge/intel/e7520/pciexp_porta1.c
index c79535f..250db0a 100644
--- a/src/northbridge/intel/e7520/pciexp_porta1.c
+++ b/src/northbridge/intel/e7520/pciexp_porta1.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };
-
-
diff --git a/src/northbridge/intel/e7520/pciexp_portb.c b/src/northbridge/intel/e7520/pciexp_portb.c
index b20abde..d45bb31 100644
--- a/src/northbridge/intel/e7520/pciexp_portb.c
+++ b/src/northbridge/intel/e7520/pciexp_portb.c
@@ -38,5 +38,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };
-
-
diff --git a/src/northbridge/intel/e7520/pciexp_portc.c b/src/northbridge/intel/e7520/pciexp_portc.c
index d2706d1..6b3d4d3 100644
--- a/src/northbridge/intel/e7520/pciexp_portc.c
+++ b/src/northbridge/intel/e7520/pciexp_portc.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };
-
-
diff --git a/src/northbridge/intel/e7525/chip.h b/src/northbridge/intel/e7525/chip.h
index c7783d4..c98555c 100644
--- a/src/northbridge/intel/e7525/chip.h
+++ b/src/northbridge/intel/e7525/chip.h
@@ -3,4 +3,3 @@ struct northbridge_intel_e7525_config
         /* Interrupt line connect */
         unsigned int intrline;
 };
-
diff --git a/src/northbridge/intel/e7525/northbridge.h b/src/northbridge/intel/e7525/northbridge.h
index 0ee533f..9299091 100644
--- a/src/northbridge/intel/e7525/northbridge.h
+++ b/src/northbridge/intel/e7525/northbridge.h
@@ -5,4 +5,3 @@ extern unsigned int e7525_scan_root_bus(device_t root, unsigned int max);
 
 
 #endif /* NORTHBRIDGE_INTEL_E7525_H */
-
diff --git a/src/northbridge/intel/e7525/pciexp_porta.c b/src/northbridge/intel/e7525/pciexp_porta.c
index 4bae287..daf218e 100644
--- a/src/northbridge/intel/e7525/pciexp_porta.c
+++ b/src/northbridge/intel/e7525/pciexp_porta.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
 };
-
-
diff --git a/src/northbridge/intel/e7525/pciexp_porta1.c b/src/northbridge/intel/e7525/pciexp_porta1.c
index b54ee8a..8f54714 100644
--- a/src/northbridge/intel/e7525/pciexp_porta1.c
+++ b/src/northbridge/intel/e7525/pciexp_porta1.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PA1,
 };
-
-
diff --git a/src/northbridge/intel/e7525/pciexp_portb.c b/src/northbridge/intel/e7525/pciexp_portb.c
index 7b78b42..3487fa9 100644
--- a/src/northbridge/intel/e7525/pciexp_portb.c
+++ b/src/northbridge/intel/e7525/pciexp_portb.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PB,
 };
-
-
diff --git a/src/northbridge/intel/e7525/pciexp_portc.c b/src/northbridge/intel/e7525/pciexp_portc.c
index da6eaf7..e181bf1 100644
--- a/src/northbridge/intel/e7525/pciexp_portc.c
+++ b/src/northbridge/intel/e7525/pciexp_portc.c
@@ -37,5 +37,3 @@ static const struct pci_driver pci_driver __pci_driver = {
         .vendor = PCI_VENDOR_ID_INTEL,
         .device = PCI_DEVICE_ID_INTEL_PCIE_PC,
 };
-
-
diff --git a/src/northbridge/intel/fsp_sandybridge/acpi.c b/src/northbridge/intel/fsp_sandybridge/acpi.c
index 3c15615..3e47ed4 100644
--- a/src/northbridge/intel/fsp_sandybridge/acpi.c
+++ b/src/northbridge/intel/fsp_sandybridge/acpi.c
@@ -198,5 +198,3 @@ int init_igd_opregion(igd_opregion_t *opregion)
 
 	return 0;
 }
-
-
diff --git a/src/northbridge/intel/fsp_sandybridge/chip.h b/src/northbridge/intel/fsp_sandybridge/chip.h
index 7e6c1d8..9b5f605 100644
--- a/src/northbridge/intel/fsp_sandybridge/chip.h
+++ b/src/northbridge/intel/fsp_sandybridge/chip.h
@@ -39,4 +39,3 @@ struct northbridge_intel_fsp_sandybridge_config {
 	u32 gpu_cpu_backlight;	/* CPU Backlight PWM value */
 	u32 gpu_pch_backlight;	/* PCH Backlight PWM value */
 };
-
diff --git a/src/northbridge/intel/fsp_sandybridge/gma.h b/src/northbridge/intel/fsp_sandybridge/gma.h
index bd4c266..cdf5d91 100644
--- a/src/northbridge/intel/fsp_sandybridge/gma.h
+++ b/src/northbridge/intel/fsp_sandybridge/gma.h
@@ -165,4 +165,3 @@ typedef struct {
 } __attribute__((packed)) optionrom_vbt_t;
 
 #define VBT_SIGNATURE 0x54425624
-
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index ed5bf99..335ef68 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -45,4 +45,3 @@ void gm45_early_init(void)
 	pci_write_config8(d0f0, D0F0_PAM(5), 0x33);
 	pci_write_config8(d0f0, D0F0_PAM(6), 0x33);
 }
-
diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
index 4327045..adf92a1 100644
--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
@@ -249,4 +249,3 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
 		mchbar += 0x0040;
 	}
 }
-
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index c2ab2a5..d4694b5 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -197,4 +197,3 @@ void raminit_thermal(const sysinfo_t *sysinfo)
 	tmp = MCHBAR32(0x11d4) & ~0x1f;
 	MCHBAR32(0x11d4) = tmp | 4;
 }
-
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 81da086..964a9d3 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -191,5 +191,3 @@ int init_igd_opregion(igd_opregion_t *opregion)
 
 	return 0;
 }
-
-
diff --git a/src/northbridge/intel/haswell/gma.h b/src/northbridge/intel/haswell/gma.h
index bfa43ef..29281ba 100644
--- a/src/northbridge/intel/haswell/gma.h
+++ b/src/northbridge/intel/haswell/gma.h
@@ -165,4 +165,3 @@ typedef struct {
 } __attribute__((packed)) optionrom_vbt_t;
 
 #define VBT_SIGNATURE 0x54425624
-
diff --git a/src/northbridge/intel/haswell/minihd.c b/src/northbridge/intel/haswell/minihd.c
index cef6126..4a38b28 100644
--- a/src/northbridge/intel/haswell/minihd.c
+++ b/src/northbridge/intel/haswell/minihd.c
@@ -137,4 +137,3 @@ static const struct pci_driver haswell_minihd __pci_driver = {
 	.vendor	 = PCI_VENDOR_ID_INTEL,
 	.devices = pci_device_ids,
 };
-
diff --git a/src/northbridge/intel/haswell/mrccache.c b/src/northbridge/intel/haswell/mrccache.c
index f411db6..a921e04 100644
--- a/src/northbridge/intel/haswell/mrccache.c
+++ b/src/northbridge/intel/haswell/mrccache.c
@@ -248,4 +248,3 @@ struct mrc_data_container *find_current_mrc_cache(void)
 	//  0. compare MRC data to last mrc-cache block (exit if same)
 	return find_current_mrc_cache_local(cache_base, cache_size);
 }
-
diff --git a/src/northbridge/intel/i3100/chip.h b/src/northbridge/intel/i3100/chip.h
index 3674801..ca76b02 100644
--- a/src/northbridge/intel/i3100/chip.h
+++ b/src/northbridge/intel/i3100/chip.h
@@ -22,4 +22,3 @@ struct northbridge_intel_i3100_config
 	/* Interrupt line connect */
 	u16 intrline;
 };
-
diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h
index 2d0ebcc..149517a 100644
--- a/src/northbridge/intel/i440bx/i440bx.h
+++ b/src/northbridge/intel/i440bx/i440bx.h
@@ -86,4 +86,3 @@
 #define DWTC    0xe0 /* DRAM Write Thermal Throttling Control (0x000..000). */
 #define DRTC    0xe8 /* DRAM Read Thermal Throttling Control (0x000..000). */
 #define BUFFC   0xf0 /* Buffer Control Register (0x0000). */
-
diff --git a/src/northbridge/intel/i440lx/i440lx.h b/src/northbridge/intel/i440lx/i440lx.h
index 5e49b81..47d5b52 100644
--- a/src/northbridge/intel/i440lx/i440lx.h
+++ b/src/northbridge/intel/i440lx/i440lx.h
@@ -70,4 +70,3 @@
 #define PAM4    0x5d
 #define PAM5    0x5e
 #define PAM6    0x5f
-
diff --git a/src/northbridge/intel/i440lx/raminit.c b/src/northbridge/intel/i440lx/raminit.c
index d96e4eb..26c0c4b 100644
--- a/src/northbridge/intel/i440lx/raminit.c
+++ b/src/northbridge/intel/i440lx/raminit.c
@@ -451,4 +451,3 @@ static void sdram_enable(void)
 
 	PRINT_DEBUG("Northbridge following SDRAM init:\n");
 }
-
diff --git a/src/northbridge/intel/i82830/i82830.h b/src/northbridge/intel/i82830/i82830.h
index 40c32c9..bdf7e51 100644
--- a/src/northbridge/intel/i82830/i82830.h
+++ b/src/northbridge/intel/i82830/i82830.h
@@ -49,4 +49,3 @@
 #define APBASE  0x10 /* Aperture Base Configuration (0x00000008) */
 #define APSIZE  0xb4 /* Apterture Size (0x00) */
 #define ATTBASE 0xb8 /* Aperture Translation Table Base (0x00000000) */
-
diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c
index 919c653..0ab4d38 100644
--- a/src/northbridge/intel/i855/raminit.c
+++ b/src/northbridge/intel/i855/raminit.c
@@ -981,4 +981,3 @@ static void sdram_set_spd_registers(void)
 	/* Setup Initial Northbridge Registers */
 	northbridge_set_registers();
 }
-
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 2640cca..e05bd58 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -71,5 +71,3 @@ unsigned long acpi_fill_mcfg(unsigned long current)
 
 	return current;
 }
-
-
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index a55ea05..08ce10b 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -903,4 +903,3 @@ void i945_late_initialization(void)
 
 	i945_setup_root_complex_topology();
 }
-
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 2197186..c04483e 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -152,4 +152,3 @@ static const struct pci_driver i945_gma_func1_driver __pci_driver = {
 	.vendor	= PCI_VENDOR_ID_INTEL,
 	.device	= 0x27a6,
 };
-
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c
index 15829c5..88d6a00 100644
--- a/src/northbridge/intel/i945/rcven.c
+++ b/src/northbridge/intel/i945/rcven.c
@@ -335,4 +335,3 @@ void receive_enable_adjust(struct sys_info *sysinfo)
 		if (receive_enable_autoconfig(0x80, sysinfo))
 			return;
 }
-
diff --git a/src/northbridge/intel/nehalem/chip.h b/src/northbridge/intel/nehalem/chip.h
index 95f8b5f..e33d108 100644
--- a/src/northbridge/intel/nehalem/chip.h
+++ b/src/northbridge/intel/nehalem/chip.h
@@ -44,4 +44,3 @@ struct northbridge_intel_nehalem_config {
 	int gpu_link_frequency_270_mhz;
 	int gpu_lvds_num_lanes;
 };
-
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 0a179ca..398cb30 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -198,5 +198,3 @@ int init_igd_opregion(igd_opregion_t *opregion)
 
 	return 0;
 }
-
-
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h
index 16df91b..17bc7e7 100644
--- a/src/northbridge/intel/sandybridge/chip.h
+++ b/src/northbridge/intel/sandybridge/chip.h
@@ -39,4 +39,3 @@ struct northbridge_intel_sandybridge_config {
 	u32 gpu_cpu_backlight;	/* CPU Backlight PWM value */
 	u32 gpu_pch_backlight;	/* PCH Backlight PWM value */
 };
-
diff --git a/src/northbridge/intel/sandybridge/gma.h b/src/northbridge/intel/sandybridge/gma.h
index 63368f1..bc5d986 100644
--- a/src/northbridge/intel/sandybridge/gma.h
+++ b/src/northbridge/intel/sandybridge/gma.h
@@ -170,4 +170,3 @@ struct northbridge_intel_sandybridge_config;
 
 int i915lightup(const struct northbridge_intel_sandybridge_config *info,
 		u32 physbase, u16 pio, u32 mmio, u32 lfb);
-
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c
index 915f9d3..c84ff82 100644
--- a/src/northbridge/intel/sandybridge/mrccache.c
+++ b/src/northbridge/intel/sandybridge/mrccache.c
@@ -247,4 +247,3 @@ struct mrc_data_container *find_current_mrc_cache(void)
 	//  0. compare MRC data to last mrc-cache block (exit if same)
 	return find_current_mrc_cache_local(cache_base, cache_size);
 }
-